Top Tweets for #Rram
From Sensor to Physical AI
$DVL CEO Mathew Regan discusses Sensor v6.5, bringing more intelligence onto the device and opening opportunities across healthcare, defence, distribution and workplace safety.
Watch the full interview below.
#PhysicalAI #RRAM
🎥 From Sensor to Physical AI
$DVL CEO Mathew Regan discusses Sensor v6.5, bringing more intelligence onto the device and opening opportunities across healthcare, defence, distribution and workplace safety.
Watch the full interview below.
#PhysicalAI #RRAM
🎥 From Sensor to Physical AI
$DVL CEO Mathew Regan discusses Sensor v6.5, bringing more intelligence onto the device and opening opportunities across healthcare, defence, distribution and workplace safety.
Watch the full interview below.
#PhysicalAI #RRAM
Phoenix is pleased to share an update from dorsaVi (ASX: $DVL) CEO, Matt Regan, on the Company’s RRAM development with NTU and ITRI.
The RRAM program is progressing through its initial 180nm manufacturing stage, with three candidate materials being developed toward 22nm. The technology offers potential for low-power, high-speed memory and compute-in-memory applications.
dorsaVi expects its first 180nm RRAM chips around December, enabling testing within its medical-grade sensor and laying the foundation for broader physical AI, autonomous robotics and neuromorphic computing applications.
@dorsavi @dorsaViUSA
$DVL 🔥🔥🔥
#dorsaVi has finished the basic building blocks of its new #RRAM validation chip using TSMC’s proven process.
This key step clears the way for the company to add its special memory tech next.
It’s moving closer to #low_power chips for #smarter_robots, #wearables and #AI_devices.
$DVL 🔥🔥🔥
#dorsaVi unveiled Sensor v6.5 our first Physical AI wearable.
Processes movement, decides and delivers real time feedback right on the device.
No iPad. No cloud.
Commercialisation ready. Built on our FDA cleared platform.
Big step for Ultra Edge.
$DVL
dorsaVi Completes Foundational CMOS Fabrication for #RRAM
Validation Chip
Front-end-of-line and middle-of-line fabrication completed through TSMC's established CMOS process, enabling the validation wafers to advance into the program's proprietary #RRAM integration phase..
Established CMOS foundation for proprietary #RRAM integration, Completing the underlying CMOS circuitry through TSMC's established process allows the Company's proprietary #RRAM architecture to be subsequently integrated through dedicated back-end processing.
$DVL $31M MC💥
#ASX #RERAM NEWS
⏩️ $DVL COMPLETES FOUNDATIONAL CMOS FABRICATION FOR #RRAM VALIDATION CHIP THROUGH #TSMC’S ESTABLISHED CMOS PROCESS, enabling the validation wafers to advance into the program’s proprietary #RRAM integration phase⏪️
🔷️Wafers advance into proprietary #RRAM integration. The next stage begins with fabrication of the engineered via structure that forms the #RRAM bottom electrode, followed by deposition of the proprietary RRAM material stack and subsequent BEOL processing toward electrical testing.
🔷️Advances high-value physical #AI markets: Progressing the validation chip into RRAM integration supports $DVL’s roadmap toward low-power, non-volatile edge hardware for applications including #robotics, #exoskeletons , autonomous systems and other Physical AI platforms.
$DVL #ASX #RRAM
RERATE COMING SOON ?❓️?
$DVL ($31M MC) is 1 of 2 #ReRAM Plays in #ASX alongside $WBT ($1B MC)
$DVL Commenced Silicon Fabrication of First #RRAM -CMOS Validation Chip
Commercialisation pathway 👇
1. Silicon manufacturing has commenced✅️
2. Design package accepted into the foundry flow✅️
3. CMOS base now in production✅️
4. Program has moved from data to physical wafer✅️
5. Key Milestone in RRAM-CMOS Validation Chip Tape-out✅️
6. Builds towards @dorsavi’s RRAM Platform as Critical Memory Infrastructure for the Physical AI✅️
Ex $AYA CEO Matt Regan is now running $DVL 👇
$DVL #ASX #RRAM
RERATE COMING SOON ?❓️?
$DVL ($31M MC) is 1 of 2 #ReRAM Plays in #ASX alongside $WBT ($1B MC)
$DVL Commenced Silicon Fabrication of First #RRAM -CMOS Validation Chip
Commercialisation pathway 👇
1. Silicon manufacturing has commenced✅️
2. Design package accepted into the foundry flow✅️
3. CMOS base now in production✅️
4. Program has moved from data to physical wafer✅️
5. Key Milestone in RRAM-CMOS Validation Chip Tape-out✅️
6. Builds towards @dorsavi’s RRAM Platform as Critical Memory Infrastructure for the Physical AI✅️
Ex $AYA CEO Matt Regan is now running $DVL 👇
Phoenix is pleased to share an update from dorsaVi (ASX: $DVL) CEO, Mathew Regan, on the Company’s next phase of growth.
dorsaVi’s Sensor V6.5 is bringing more intelligence directly onto the sensor, enabling on-device processing, data storage, alerts and Bluetooth connectivity.
The upgraded platform is opening new opportunities across Defence, occupational health & safety and international distributor markets, while the Company continues progressing its RRAM technology roadmap toward 22nm.
@dorsavi @dorsaViUSA
$DVL Commences Silicon Fabrication of First RRAM-CMOS Validation Chip
2.7c | $28m MC | DYOR
Commercialisation pathway 👇
1. Silicon manufacturing has commenced✅️
2. Design package accepted into the foundry flow✅️
3. CMOS base now in production✅️
4. Program has moved from data to physical wafer✅️
5. Key Milestone in RRAM-CMOS Validation Chip Tape-out✅️
6. Builds towards dorsaVi’s RRAM Platform as Critical Memory Infrastructure for the Physical AI✅️
#Healthcare #Rehab #EliteSport #Defence #Robotics #exoskeletons
$DVL #ASX #ReRAM NEWS
⏩️Silicon production of $DVL's first #RRAM-CMOS validation chip has commenced, with the CMOS base now being fabricated ahead of #RRAM integration and wafer-level electrical testing⏪️
Only 2 #ReRAM Plays in #ASX
$WBT $1067M MC
$DVL $28M MC
$DVL #ASX #ReRAM
$35M MC💥
Quarterly Out
So much progress last few months & still has $2.1M CASH IN BANK💥
⏩️ $DVL completed the design of its first integrated RRAM-CMOS validation chip, developed with NTU Singapore and ITRI Taiwan, advancing the program into FABRICATION & TAPE-OUT
⏩️All three candidate #RRAM material stacks passed Back-End-of-Line (BEOL) compatibility testing on standard commercial CMOS foundry lines, with 180nm test chip tape-out targeted for Q3 2026 ahead of the 22nm design phase in H2 2027.
⏩️#RRAM Stability Confirmed to 150°C,with zero permanent thermal degradation.
⏩️RRAM–#Neuromorphic Synergy Validated: Technical validation completed, confirming its RRAM platform & neuromorphic IP operate together as a coherent system
$DVL #ASX #RRAM
RERATE COMING SOON ?❓️?
$DVL ($35M MC) is 1 of 2 #ReRAM Plays in #ASX alongside $WBT ($1.27B MC)
⏩️ $DVL has commenced the tape-out process for its first 16NM #RRAM-CMOS validation chip with tier-one #semiconductor partners, progressing the program from finalised design package into staged silicon implementation⏪️
$NVU 9.8% UP💥
$NVUO 80% UP💥
#Semiconductor #AI #Drones #DroneTech #EdgeAI
Let's keep the party going folks😎🥃💥
$DVL $35M MC needs to join the party soon, 1 of 2 #ASX #ReRAM plays alongside $1.3BIL $WBT
💥 $DVL 2 WEEKS AGO COMMENCED TAPE-OUT OF 16NM #RRAM VALIDATION CHIP💥
$NVU 9.8% UP💥
$NVUO 80% UP💥
#Semiconductor #AI #Drones #DroneTech #EdgeAI
Let's keep the party going folks😎🥃💥
$DVL $35M MC needs to join the party soon, 1 of 2 #ASX #ReRAM plays alongside $1.3BIL $WBT
💥 $DVL 2 WEEKS AGO COMMENCED TAPE-OUT OF 16NM #RRAM VALIDATION CHIP💥
Another unforgettable Saturday night with few good mates🥃💥
Drink of the night #HennessyParadis❤️💥
Tough markets atm but we never quit. The show must go on 💪😎💯
Have a great Sunday #Fintwit🥂
$ALR $DAL $VMM $DVL $NVU #1AD $SIS $SKN $CRR #ASX #Investing
Explore the #IndustrialManufacturing advances of embedded resistive random access memory (#RRAM). This review examines #Manufacturing advances, integration strategies, and emerging applications in IoT, intelligent computing, and #Neuromorphic hardware.
#IJEM #OpenAccess: https://t.co/OX2hkc0VVV
$DVL 👇
The implementation flow uses commercial CMOS frontend wafers sourced through #TSMC, followed by partner-led #BEOL & #RRAM integration before wafer-level electrical testing✅️
Supports $DVL's broader roadmap for low-power, local intelligence in future sensing, #robotics, #exoskeleton, #defence, medical/wearable & industrial #AI hardware platforms✅️
$DVL #ASX #ReRAM NEWS💥
⏩️ $DVL COMMENCES TAPE-OUT OF VALIDATION CHIP, A KEY MILESTONE IN 22NM #RRAM DEVELOPMENT PATHWAY⏪️
$DVL is 1 of 2 #ASX #ReRAM PLAYS
$WBT $1.7Bil MC💥
$DVL $32M MC💥
⏩️The implementation flow uses commercial CMOS frontend wafers sourced through #TSMC, followed by partner-led #BEOL & #RRAM integration before wafer-level electrical testing⏪️
Supports $DVL's broader roadmap for low-power, local intelligence in future sensing, #robotics, #exoskeleton, #defence, medical/wearable & industrial #AI hardware platforms.
$DVL🔥🔥
#dorsaVi has started tape out of its first #RRAM validation chip with tier-1 partners.
Design now moves into real silicon making for testing.
Key step toward low-l power memory for edge #AI in robotics, exoskeletons and wearables.
Steady progress on the commercial path.
Next up: wafer test results.
$DVL #ASX #ReRAM NEWS💥
⏩️ $DVL COMMENCES TAPE-OUT OF VALIDATION CHIP, A KEY MILESTONE IN 22NM #RRAM DEVELOPMENT PATHWAY⏪️
$DVL is 1 of 2 #ASX #ReRAM PLAYS
$WBT $1.7Bil MC💥
$DVL $32M MC💥
⏩️The implementation flow uses commercial CMOS frontend wafers sourced through #TSMC, followed by partner-led #BEOL & #RRAM integration before wafer-level electrical testing⏪️
Supports $DVL's broader roadmap for low-power, local intelligence in future sensing, #robotics, #exoskeleton, #defence, medical/wearable & industrial #AI hardware platforms.
$DVL MAJOR #ReRAM NEWS💥
$DVL (49M MC) is the Only #ReRam Play in #ASX behind $WBT ($1.85B MC)
⏩️ $DVL FINALISES DESIGN OF #RRAM-CMOS VALIDATION #CHIP, ADVANCING THE PROGRAM TO FABRICATION⏪️
⏩️Completed design locks in three key capabilities boosting performance & scalability
💥Self-checking write & verify
💥Compute-in-memory that computes inside the array
💥Integration on standard commercial CMOS
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