这段视频展现了世界著名头部播客博主Lex Fridman 在中国旅行搭乘顺风车时的场景,应该不是AI!
Lex Fridman 近期公开表示,自己从2026年5月中旬开始展开一场“无固定计划”的全球旅行,第一站就是中国。他在5月14日发文称,计划先前往北京、上海、深圳等大城市,与中国 AI 工程师和科技从业者交流,了解中国 AI 产业的发展;随后会背着背包前往中国农村地区,尝试人生第一次搭顺风车(hitchhiking),深入接触普通民众与长途卡车司机。他提到希望重点前往河北、山西、陕西、甘肃、四川、云南等地,并可能在中国停留数周,然后继续前往亚洲、中东、欧洲以及美洲等地区展开开放式旅行。整个行程强调“没有明确路线、只有背包和随机冒险”,核心目标是接触不同社会阶层的人,体验真实的地方文化与日常生活。
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On Nvidia’s Vera CPU –
First, let’s revisit the CPU architecture (see attached image) and its bundled memory
The referenced SOCAMM is a data centre class modular form factor for LPDDR5X (not to be conflated as two different things)
Now, 1 LPDDR5X DRAM die = 9.6Gbps/bit (max). Assuming a 32-bit package, 1 LPDDR5X DRAM package = 9.6 x 32 = 307.2Gbps (~38GB/s) bandwidth
1 SOCAMM is constructed using four LPDDR5X DRAM packages. Total bandwidth per SOCAMM = 38 x 4 = ~154GB/s
The Vera CPU setup uses 8 SOCAMM (8-channel), and therefore has 8 x 154 = ~1.2TB/s of bandwidth
The 1.5TB refers to the capacity. Assuming 32 (8 x 4) LPDDR5X DRAM packages in 1 Vera CPU, this infers the use of 48GB DRAM packages (not 192GB), i.e., 32 x 48. This could be for thermal/power management reasons
In short, each Vera CPU set up = 8 SOCAMMs = 32 LPDDR5X DRAM packages = 1.5TB capacity (32 x 48GB) = up to 1.2TB/s of bandwidth
Second, on market opportunity
Nvidia guided visibility into ~$20B of CPU revenue this year. What is unknown is how this breaks down into sales configurations (and by extension, the memory modules/density types that may be required)
Possible configurations:
1 – as part of Vera Rubin. Assuming NVL72 setup (72 Rubin GPUs, 36 Vera CPUs), total LPDDR5X memory capacity = ~55TB (36 x 8 x 4 x 48), which could potentially be higher if they use higher-capacity memory packages (with liquid cooling)
2 – dedicated Vera CPU racks. Each rack packs 256 Vera CPUs, and therefore up to ~400TB of LPDDR5X memory (256 x 8 x 4 x 48), which could potentially be higher if they use higher-capacity memory packages (with liquid cooling)
3 – individual Vera CPU servers. On the low end will be single and dual socket servers, with one or two Vera CPUs per tray/node respectively. For this configuration, memory capacity = 1.5TB / 3.0TB (assuming use of 48GB modules, with air cooling). Whereas on the high-end, such as the ones being developed by HPE (Cray Supercomputing GX240), this could go up to 640 Vera CPUs = close to ~1000TB. There is also the HGX Rubin NVL8 configuration, with one or two CPUs wired up (with similar memory capacities as a the single/dual socket servers)
In short, it’s challenging to accurately size up the total bit demand for LPDDR5X without knowing the exact sales configurations
What may be a better play is memory PHY/controllers IP –
Each SOCAMM requires 4 x LPDDR5X PHY and memory controllers. For Vera CPU which uses 8 SOCAMMs, each CPU = 32 LPDDR5X PHYs and memory controllers. All that is needed is the average list/sale price for CPU, divide $20B by this number to derive the implied number of Vera CPUs to be sold, that then allows you to derive the dollar content for memory PHY/controllers
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