Spent days debugging instruction decoding,Built my custom pipelined MIPS processor on Basys 3 FPGA with a working dot-product accelerator.
After endless debugging, finally got the correct hardware output: 0032.
Now I want to make it dynamic and want to cnn in it can anyone help
@CartayaRen92307@cdacindia Not entirely. Open-source tools can handle simulation and some synthesis, but Cyclone II doesn't have stable open-source support for place-and-route or bitstream generation. For a Cyclone II, you'll still need Quartus for the complete FPGA flow.