Making advanced chips requires more than advanced lithography.
It takes metrology, inspection and computational lithography working together – from R&D to high-volume manufacturing – to keep chipmaking economical.
That’s holistic lithography. Watch the animation for more. 👇
Learning how to precisely print microchip patterns starts in R&D. By integrating computational lithography, optical metrology and e-beam inspection with lithography systems, holistic lithography helps chipmakers fine-tune their patterns before volume production begins.
The first major components of our TWINSCAN EXE:5200B High NA EUV system have arrived at @NY__Creates’ Albany NanoTech Complex in the US, bringing next-gen lithography capabilities to an R&D environment for industry and academic partners.
Learn more. ⬇️ https://t.co/Rw02H5chMA
On July 15, we reported €9.3 billion in total net sales and €2.9 billion in net income for Q2 2026.
We expect our 2026 total net sales to be between €43 billion and €45 billion, with a gross margin between 54% and 56%
How do chipmakers print complex chip patterns reliably, wafer after wafer?
Holistic lithography integrates computational modeling, optical measurement, e-beam inspection and lithography systems to help chipmakers optimize faster and better control the patterning process.
High NA EUV has reached a new readiness milestone. 🎉
@Intel_Foundry has entered high-volume manufacturing for a subset of Intel® Core™ Ultra Series 3 processors using ASML’s High NA EUV technology on its Intel 18A process.
Read more ⬇️ https://t.co/cPgkspVJa1
Fouquet: “Our customers, in turn, continue to accelerate their capacity expansion plans. This is translating into customer commitments across our product portfolio, providing ASML with increased visibility into longer-term demand.”
CEO Christophe Fouquet: “Ongoing AI-related investments and continued progress in AI technologies are driving demand for advanced Logic and Memory chips, further strengthening the semiconductor industry's growth outlook.”
How is AI helping drive innovation at ASML? 🚀
From accelerating simulations and software development to improving lithography performance and customer support, AI is helping teams work smarter across ASML.
Learn more in our 2025 Annual Report. ⬇️ https://t.co/IsHRVeGPIp
MIT @techreview explores how High NA EUV is powering the future of chipmaking. AI needs more powerful chips, and High NA EUV prints the tiny chip features that make them possible. Read more. 👇 https://t.co/nWreSPFTl7
Following our keynote at @MistralAI's AI Now Summit, we’re going deeper.
This article explores how we apply AI across our systems – from translating chip design to improving performance in the field.
Read more. 👇 https://t.co/iZhEQ7Mv0O
Another successful Technology Conference is in the books! 🎉
Around 10,000 ASMLers joined us across five locations and online to share experiences, lessons learned and the latest innovations.
Thank you to everyone who presented, participated and shared their expertise.
Chips are like tiny skyscrapers that can have more than 100 layers. The lowest, most critical layers form the transistors, while upper layers route power and signals. For chipmakers, choosing the right lithography for each layer is key to balancing precision and cost.
@EP_President@RobertaMetsola@Europarl_EN@EPWashingtonDC We are grateful for the visit and the exchange, Madam President. We look forward to working with you and the European Parliament to build a stronger Europe within a thriving global tech ecosystem.
Billions of transistors with features just nanometers wide power today’s most advanced devices – and our extreme ultraviolet (EUV) lithography tech makes these nanoscale features a reality.
Meet the latest addition to ASML’s Board of Management: Marco Pieters, our CTO.
With more than 25 years at ASML across DUV lithography, metrology and inspection, and EUV lithography, Marco brings deep technical expertise to the role.
Read more ⬇️ https://t.co/LWIdGb6wYe