Andes Technology

Andes Technology Corp. is a world class creator of innovative high-performance/low-power RISC-V 32/64-bit processor cores & associated development environment.

[Andes Technology @Andes_Tech]

Excited to announce the partnership between Axelera AI & Andes🙌The integration of Andes AX65 into Axelera AI’s Europa AI Platform marks a significant milestone in the mission to democratize AI! See how RISC-V works in a new era of edge intelligence🚀More: https://t.co/e8iEqrW4tV

[Andes Technology @Andes_Tech]

GSOC Solutions and Andes Technology announced a strategic partnership to expand RISC-V CPU options for configurable SoC and chiplet platforms🎉Giving customers more trusted, market-proven choices to build next-gen silicon for demanding applications! More: https://t.co/T9YxpNK9bm

[Andes Technology @Andes_Tech]

The strategic collaboration between OSYX Technologies and Andes on RISC-V virtualization! This paves the way for broader virtualization support across Andes processors and highlights RISC-V’s continued maturation toward production-ready platforms��More: https://t.co/N93u51Jsws

[Andes Technology @Andes_Tech]

Our talk at Design And Reuse IP-SoC Silicon Valley 2026 was a success. Marc Evans presented “RISC-V Now! Adaptation Velocity at AI Scale,” highlighting how RISC-V is driving AI innovation. Great to join industry leaders shaping the future of semiconductors.

#RISCV #AI

[Andes Technology @Andes_Tech]

Thanks to our customers, partners & attendees who made RISC-V Now! a success. From strong community momentum to a standout Deep Dive Day, RISC-V is happening now. Excited for the commercial breakthroughs ahead.
#RISCV #Semiconductor

[Andes Technology @Andes_Tech]

Come eat, hang out, & check out what’s next in AI & silicon @ RISC-V Now! We've got deep-dive sessions & a full day of expert talks & panels. Connect with industry leaders, learn, & be part of where RISC-V commercial happens. 4/20-21 in San Jose, CA.
Reg: https://t.co/mZRzSRcHVk

[Andes Technology @Andes_Tech]

RISC-V Now! brings the full story, from AI & datacenter to automotive & edge, in one day.

Hear from the engineers building real systems, and don’t miss the expert panel on deploying RISC-V in high-performance production.

April 21 | San Jose, CA
Register: https://t.co/mZRzSRcHVk

[Andes Technology @Andes_Tech]

Join us at RISC-V Now! for talks from @bayasystems & @BrekerSystems on AI data movement bottlenecks & RISC-V subsystem verification. April 21st in San Jose, CA
Register: https://t.co/mZRzSRcHVk
#Baya #Breker #RISCV

[Andes Technology @Andes_Tech]

Join us at RISC-V Now! for a grounded look at how AI really works from how systems are built, trained, & deployed, & the real constraints shaping scale. Learn what’s next for AI & industry leaders. April 21 in San Jose, CA. Register: https://t.co/mZRzSRcHVk

[Andes Technology @Andes_Tech]

Join us at RISC-V Now! to hear from Aion Silicon, @AxeleraAI, @dMatrix_AI, and Linley Gwennap on deploying AI with RISC-V from datacenter to edge. Real architectures, real systems, real insights.

Join us on April 21 in San Jose, CA: https://t.co/mZRzSRcHVk

[Andes Technology @Andes_Tech]

Deploying RISC-V in high-performance systems, what does it really take? Join leaders from Google, Qualcomm & Red Hat at RISC-V Now! for a candid panel on ecosystem readiness, software maturity & scaling to production.

April 21 | San Jose, CA
Register: https://t.co/mZRzSRca5M

[Andes Technology @Andes_Tech]

See how RISC-V drives next-gen vehicles @ RISC-V Now on 4/21 in San Jose, CA:

Darren Jones (Andes) – ASIL Safety: More Than DCLS
Guillaume Boillet (@arteris_noc) – Securing RISC-V Designs
Pedro López Estepa (Quintauris) – From Lab to Car

Reg: https://t.co/mZRzSRcHVk

#RISCV

[Andes Technology @Andes_Tech]

Join us at RISC-V Now! for “RISC-V: Spanning Datacenter to Edge” by Oliver Jones, CEO of Aion Silicon. Discover how RISC-V is powering AI innovation across datacenter and edge. April 21 | San Jose (DoubleTree). #RISCV #AionSilicon
Register: https://t.co/mZRzSRcHVk

[Andes Technology @Andes_Tech]

Great insights from @DanielNenni on RISC-V's impact on the semiconductor industry. We’re proud to support this evolution by helping drive real-world adoption through initiatives like RISC-V Now!
Read more: https://t.co/UlbGM48DKY
Reg: https://t.co/tbWPt1JjvI
#RISCV #SemiWiki

[Andes Technology @Andes_Tech]

Wrapping up a great week at embedded world! The Andes Technology team connected with partners and the embedded community, with talks from our team and Dr. Su on a RISC-V roadmap panel. Thanks to TASKING for hosting a great dinner. See you next year! #embeddedworld #RISCV

[Andes Technology @Andes_Tech]

The RISC-V Now! website has been refreshed. New speakers. New partners. More event details. Also announcing our Silicon Valley Deep Dive Day (April 20, 2026) with focused technical sessions.
Learn more: https://t.co/kKDOsaVUQt
Register: https://t.co/QRQHBXatAJ
#RISCV

[Andes Technology @Andes_Tech]

Ready to power your next innovation? 💡
Visit Andes at #embeddedworld 2026 for exclusive Booth Talks and live tech demos. Don't miss Dr. Charlie Su discussing the future of #RISCV!

���� Hall 5, Booth 5-119, Kiosk 6
🇩🇪 See you in Nuremberg!

[Andes Technology @Andes_Tech]

Konnichiwa, Tokyo! 🇯🇵
Join Andes at RISC-V Day Tokyo 2026 Spring!
Don't miss our Chairman & CEO Frankwell Lin’s keynote: Powering the Future of Compute with Andes #RISCV 📅 March 5 | 15:30-16:00
Visit us at Booth #5!
Details: https://t.co/9fKrm3Q6l1

[Andes Technology @Andes_Tech]

Andes x 10xEngineers: Unleashing #GenAI on #RISCV!

The Baltoro compiler now optimizes LLaMA & DeepSeek for our AX46MPV vector cores.
📖 Full News: https://t.co/7ajejBUNGi

🔥 Want to see RISC-V in action?
Join our Global Tour: RISC-V Now! by Andes
https://t.co/QAS1ynLGzI

[Andes Technology @Andes_Tech]

@eetimes discusses RISC-V's crossing from academia to commercial reality. RISC-V Now! is this year's dedicated conference for practical insights, tech depth & real deployments.
Article: https://t.co/Oxd4iOSLvb
RVN!: https://t.co/kKDOsaVUQt
Reg: https://t.co/vBGm63wA4n...
#RISCV