Blue Snoopy

Woof

[Blue Snoopy @BeagleJournals]

@Lazarus_Capital FAT GAINZ

[Blue Snoopy @BeagleJournals]

@RJCcapital lmao

[Blue Snoopy @BeagleJournals]

@SemiAnalysis_ @finkd @alexandr_wang

[Blue Snoopy @BeagleJournals]

@jukan05 Thanks Jukan! Would you have a view on what happens to AVGO? I thought they have a custom chip design program with Meta but looks like Meta is going directly to Samsung or insourcing more of this? Seems like a broader trend across hyperscalers and Anthropic/OpenAI too

[Blue Snoopy @BeagleJournals]

You can now remotely control Claude Cowork at your desktop via your phone with the Dispatch feature. This has been one of the main use cases for OpenClaw, unless you have preference for specific models and for running open source models locally on desktop.

https://t.co/1fVWX0o48M

[Blue Snoopy @BeagleJournals]

LLM updates:

MiMo-V2-Pro, which was stealth launched as Hunter Alpha last week, has been revealed to be Xiaomi’s flagship 1 trillion+ parameter mixture-of-experts model.

It activates roughly 42B parameters per forward pass (4.2% sparsity), supports a 1M-token context window and pairs 7:1 hybrid attention with multi-token prediction (MTP) speculative decoding.

It is explicitly engineered as an agentic-first foundation model optimised for orchestration, tool use, code execution, and production engineering workflows rather than broad chat or creative writing.

The model has now climbed to rank first on OpenRouter, passing usage of other frontier LLMs such as MiniMax 2.5, DeepSeek 3.2 and Claude Opus 4.6. In the past week, the model processed over 1 trillion tokens and repeatedly topped daily volume charts. Current weekly throughput exceeds 500 billion tokens, with daily prompts in the 4–18 billion range. Over 80% of traffic are routed for agentic coding on Cline (an autonomous IDE agent) and OpenClaw.

[Xiaomi MiMo @XiaomiMiMo]

Introducing MiMo-V2-Pro & Omni & TTS
https://t.co/qdufHaBJWY

[Blue Snoopy @BeagleJournals]

$SSNLF $AMD

Samsung and AMD signed an MoU yesterday for memory supply and a potential foundry partnership.

Details of the scope of this MoU and and some topics which are relevant:

MoU Signed Between Samsung and AMD

Samsung Electronics and AMD announced yesterday that they have signed a Memorandum of Understanding to deepen collaboration on AI memory and evaluate foundry services. Under the agreement, Samsung serves as primary supplier of HBM4 for AMD’s next-generation Instinct MI455X GPUs and delivers optimized DDR5 solutions for AMD’s 6th-generation EPYC CPUs (codenamed Venice) and the Helios rack-scale AI platform. There were also discussions on Samsung providing contract manufacturing for future AMD products.

Supply and partnership scope:
(i) Primary HBM4 sourcing locked for MI455X (12-stack configuration per GPU).
(ii) Advanced DDR5 targeted at Venice CPU sockets and full-rack Helios integration.
(iii) Foundry optionality scoped for next-generation AMD silicon. Samsung initiated HBM4 mass production in February 2026 on its 10 nm DRAM process (up to 13 Gbps pin speed and 3.3 TB/s maximum bandwidth per package).

Industry Backdrop for this MoU

The MoU and Samsung’s ramp occur amid sustained HBM and DDR shortages projected through 2027 and beyond. AI infrastructure build-outs have reallocated wafer capacity across Samsung, SK Hynix, and Micron, leaving conventional DRAM and NAND supply constrained. Consumer electronics, PCs, and non-AI industrial applications face the sharpest impact as priority flows to hyperscaler GPU/accelerator programs. Samsung and SK Hynix have both publicly forecasted the capacity crunch persisting into 2027, with pricing elevated by the structural mismatch between wafer economics and demand growth.

Significance for AMD in Securing Memory

Memory bandwidth and capacity represent AMD’s primary scaling mechanism for 2026–27 AI infrastructure. The MI455X integrates 12 36-GB HBM4 stacks, delivering 432 GB on-package capacity and 19.6 TB/s peak bandwidth per GPU. This yields +125% capacity and +270% bandwidth versus MI300X (192 GB / 5.3 TB/s) and +50% capacity / +145% bandwidth versus MI350 (288 GB / 8 TB/s).

A Helios rack with 72 MI455X aggregates 31 TB total HBM4 and 1.41 PB/s system bandwidth while providing 2.9 EFLOPS FP4 compute. On the CPU side, Venice’s 16-channel DDR5 reaches 1.6 TB/s socket bandwidth—2.6 times the prior generation—removing host-side bottlenecks in agentic and orchestration workloads.

Securing primary HBM4 allocation mitigates the GPU output constraints imposed by memory shortages. Uplift in throughout in the LLM decoding phase can reduce effective cost per token by 35–45 %. Foundry discussions with Samsung also adds node flexibility. Securing this partnership and memory supply is critical for AMD’s execution in a bandwidth-constrained environment.

Samsung’s Current Strategic and Market Positioning

Samsung has positioned itself as the first mover in HBM4, commencing commercial shipments in February 2026 ahead of competitors. Production capacity for HBM is expanding approximately 50 % during 2026—from roughly 170,000 wafers per month to 250,000 wafers per month by year-end. HBM shipments are projected to triple year-over-year, with HBM4 expected to comprise roughly half of total HBM output.

Global HBM market share is forecast to rise from 16–17 % in 2025 to 35 % in 2026. Overall memory production capacity growth remains conservative at ~5 % to avoid historical oversupply cycles while maintaining pricing power.

Capacity allocation has been deliberately shifted toward high-margin AI products: every HBM wafer consumes approximately 3 times the DRAM wafer area per usable gigabyte compared with conventional DDR5 or LPDDR5X. As a result, the majority of Samsung’s advanced 10nm DRAM lines are now dedicated to AI infrastructure. Samsung has sold out its entire 2026 HBM4 allocation and is pursuing multi-year (3–5 year) supply contracts with strategic customers to secure long-term visibility.

This approach leverages Samsung’s vertical integration—memory, logic, foundry, and advanced packaging—creating a turnkey AI stack. At NVIDIA GTC 2026, Samsung showcased HBM4/HBM4E alongside SOCAMM2 modules and PM1763 SSDs explicitly for NVIDIA platforms, underscoring its role as the only supplier spanning the full AI server component set.

Samsung’s Memory Allocation Beyond AMD

Samsung’s 2026 HBM4 output is allocated primarily to hyperscaler GPU and accelerator programs:

(i) NVIDIA (Vera Rubin platform): Samsung holds an estimated up to 30% share of HBM4 supply. Shipments began February 2026 after qualification; Samsung leads the high-end performance tier with 11–13 Gbps parts exceeding NVIDIA’s 10 Gbps baseline. Customized HBM4 variants are also in discussion.
(ii) Google (TPU and custom accelerators): Customized HBM4 supply confirmed; part of broader hyperscaler long-term agreements.
(iii) Broadcom and other accelerator vendors: Active negotiations for tailored HBM4 stacks.
(iv) Remaining volume distributed across additional AI infrastructure partners under multi-year contracts.

AMD receives primary but not exclusive allocation for MI455X in this partnership.

[Blue Snoopy @BeagleJournals]

$CRDO

The recent shift in sentiment and focus towards optics based interconnects have led to compression in Credo’s stock. As its share price has declined close to 30% YTD with forward valuation multiples coming to more favourable levels, it is worth considering whether it presents a potentially compelling investment entry point.

1. Interconnect Requirements from Groq 3 LPU & the LPX Rack Architecture
The industry continues to evolve toward specialized, deterministic AI inference engines. Nvidia, following its $20 billion licensing agreement with Groq announced December 2025, has incorporated the Groq 3 LPU into the Vera Rubin ecosystem. Unlike traditional GPU-centric designs, the LPX rack—comprising 256 LPUs—leverages 128 GB of aggregate on-chip SRAM (approximately 500 MB per LPU) to address the "memory wall" associated with HBM, delivering roughly 40 PB/s aggregate SRAM bandwidth. The rack provides 640 TB/s of internal scale-up bandwidth.

Networking Deployment Mismatch: Internal interconnect bandwidth is exceptionally high, yet external Input/Output (I/O) can represent a constraint in practice. At prevailing 1.6T port speeds, theoretical full utilization of the rack's capacity without oversubscription could require on the order of thousands of external ports. In production environments, however, deployments routinely employ oversubscription ratios, hierarchical switching fabrics, and workload-optimized scaling to manage this.

Structural Shift: The LPX employs a liquid-cooled, cableless backplane for intra-rack chip-to-chip connectivity. External cabling requirements are thereby concentrated at the rack-to-spine boundary, necessitating high port density, superior signal integrity, and advanced equalization capabilities.

2. Implications on the Interconnect Industry
The rise of high-density, power-intensive racks (often exceeding 100 kW) is prompting a reconfiguration of data center fabrics.

Double Networking: Contemporary "AI factories" frequently deploy a dedicated back-end network for traffic (GPU-to-GPU or LPU-to-LPU communications), materially expanding the overall interconnect total addressable market relative to legacy cloud architectures.

Power Barriers: With rack-level power envelopes under intense scrutiny, there is a clear imperative for SerDes and DSP silicon capable of driving 800G/1.6T signals with minimal thermal dissipation, tilting the field toward purpose-built, low-power solutions over more general-purpose alternatives.

3. Interconnect Technologies: Copper-based AECs vs. Optics
At 1.6T signaling rates, passive copper cables encounter substantial attenuation over practical distances, mandating active silicon-based approaches:

Active Electrical Cables (AECs): Credo pioneered this category. AECs employ DSP-based equalization to extend reliable copper reaches to 3–7 meters, typically consuming around 50% less power than equivalent optical transceivers while providing materially higher reliability (due to the elimination of laser-related failure modes and improved MTBF characteristics).

Optics & Active Line Cables (ALCs): For reaches exceeding 7 meters, optical transceivers remain essential. ALCs represent an emerging hybrid evolution, combining DSP equalization with optical engines to deliver fiber-like distance with enhanced telemetry and power characteristics akin to AECs.

4. Current Landscape: Specialized Silicon & Optics Players
Primary silicon incumbents include Broadcom and Marvell, which dominate switch ASICs and optical DSPs. Astera Labs focuses on protocol-aware PCIe retimers for Gen 6/7 signaling restoration. In optics, Coherent and Lumentum supply critical laser components (VCSEL/EML). Credo is advancing into optical DSP territory to complement these partners while maintaining leadership in AEC solutions.

5. Credo's Technology and Products
Proprietary SerDes: A core technical advantage lies in Credo's purpose-built, low-power SerDes architecture (often described as N-1 generation optimized), enabling higher bandwidth density within thermally constrained cable assemblies compared to adaptations of more general-purpose SerDes. Key products include:

- HiWire AECs: Remain the primary revenue driver, with 800G/1.6T variants now established as the de facto standard for hyperscale rack-to-switch connectivity in many deployments.

- Bluebird/Cardinal DSPs: Position Credo for direct participation in the 1.6T optical DSP market, positioning it to compete with established offerings such as Marvell’s Nova.

- ZeroFlap: This telemetry-driven solution targets link-flap (port cycling) challenges. While marketed as a differentiator and seeing early adoption, its status as a durable competitive barrier remains to be proven, given parallel development efforts by industry peers.

6. Credo Competitive Positioning
Credo operates in a phase of rapid growth and share capture within the AEC segment.

Market Share: Estimates place Credo at approximately 70–88% of the AEC market (depending on analyst sources and definitions; >70% represents a conservative baseline).

Hyperscaler Customers: Design wins and volume ramps are confirmed with major players including Microsoft (Azure), Amazon (AWS), Google (GCP), and Meta. Oracle appears in broader hyperscaler/AI infrastructure discussions, though direct Credo-specific contributions are less explicitly detailed in recent disclosures. Early anchors (AWS, Microsoft) have been supplemented by broader diversification, mitigating single-customer concentration risks over time.

Growth Driver: Expansion derives from both competitive displacement and structural TAM growth in the 1.6T transition, where passive solutions are increasingly non-viable.

7. Financials and Valuation
Latest quarterly results: Q3 FY2026 Results (Ended Jan 31, 2026): Revenue of $407.0 million (+201.5% YoY; +52% QoQ). Non-GAAP Gross Margin: 68.6%. Non-GAAP Net Income: $208.8 million.

Management guidance on financials:
- FY2027 Revenue Growth: Guided at >50% YoY (CFO Daniel Fleming).
- Long-Term Gross Margin Target: 64%–67%. Management expects slight compression from current peaks as higher-volume AEC shipments (which carry lower margins than standalone silicon/IP) become a larger portion of the mix.
- Long-Term Operating Margin Target: 33%–37% (vs. near 50% currently)

Valuation Multiples:
- Forward P/E (FY2027): Trading at ~24.9x – 32.7x based on analyst EPS estimates of ~$3.18 to $4.72.
- Forward EV/EBITDA (FY2027): ~20x, based on a projected FY2027 EBITDA of ~$940M, based on a 50% revenue growth target on FY2026's base and at current operating margins.

[Blue Snoopy @BeagleJournals]

$NVDA
In terms of financial outlook:
- Reaffirmed ~$1T+ revenue opportunity for Blackwell and Rubin systems through 2027 that was mentioned in Jensen's keynote yesterday.
- ~$1T figure reflects current purchase orders (POs) for Blackwell and Rubin only, and excludes future booked and unshipped business, Rubin Ultra shipments, standalone Vera CPUs, Groq LPUs, BlueField DPUs, and other products.
- With the above items included, revenue visibility potentially reaches ~$1.5T, with Groq LPU alone potentially account for roughly half of the $500B incremental upside.
- Data center revenue split: 60% hyperscalers, 40% others (other cloud partners including neoclouds, sovereign AI, industrial, enterprise). Both segments expected to grow at roughly similar rates near-term, with the others segment expected to accelerate with the rise of physical AI demand.

[Blue Snoopy @BeagleJournals]

$NVDA
My key takeaways from GTC Day 2 Q&A with Jensen and CFO Colette:

Inference Strategy Update with Groq
- Nvidia’s future product roadmap has strong emphasis on inference as next phase of growth.
- Nvidia intents to integrate Groq technology into a full-stack offering, developing a low-latency, high-throughput architecture using Groq’s LPU.
- Full-stack solution (GPUs + LPUs + other components) positioned to address broadest range of use cases.
- Groq LPU is optimized specifically for final inference stage of language models, which complements Nvidia’s existing GPU portfolio.
- Groq LPU is targeted to support ~25% of LLM workloads (the most bandwidth-intensive portion), enabling enhanced inference performance for high-throughput applications.
- Groq LPU shipments expected to begin 3Q26.

[Blue Snoopy @BeagleJournals]

$NBIS
In light of the announced convertible notes, a recap and some high level thoughts as below. Let us assess the terms of the convertible notes upon closing.

Existing capital structure
- Cash: ~$3.7B.
- Debt: ~$4.2B (all from prior convertible notes below).
- Convertible notes: (i) $1B issued in Jun'25 ($500M 2.00% due 2029 + $500M 3.00% due 2031; conversion price ~$51.45), (ii) $3.2B issued in Sep'25 ($1.58B 1.00% due 2030 + $1.58B 2.75% due 2032; conversion price ~$138.75).
- Total assets: $12.5B.
- Existing debt to assets ratio at closer to 0.3x.
- Based on the previous ARR guidance of $7-9B by year-end, assuming full-year 2026 revenue at $3B and EBITDA at $1.3B at ~40% margins, debt to EBITDA is at ~3x.
- Balance sheet has broadly been healthy.

How much funding is required for this Meta contract?
- MSFT contract: $17.4B revenue across 5 years on ~300 MW represents ~$11.6M revenue/MW/year.
- Without terms of the current contract with Meta disclosed and for purposes of our analysis, let’s assume similar economics. The 5-year $12B dedicated portion of the contract would require ~207 MW. The full $27B implies ~465 MW.
- NBIS’ guided for 2026 all-in capex of $16-20B which is expected to support the ramp of its capacity from 170MW at 2025 year-end to 800MW-1GW by 2026 year-end (a ramp of 630-830MW). This implies all-in capex/MW of $20-30M/MW. At an assumed $30M/MW, the ~207-465MW for Meta costs $6.2-14.0B total capex required.
- The contemplated $3.6B fundraise only partially covers the Meta contract. The company is expected to utilize a mix of its operating cashflows, existing cash, asset-backed debt, corporate level debt or equity options (note: NBIS’ existing ATM program remains fully unutilized and could contribute $3B+ at current price levels).

[Blue Snoopy @BeagleJournals]

My key takeaways from $NVDA GTC:

1. Data centre inference is top priority for Nvidia. GB NVLink 72 is delivering 50x higher performance per watt and 35× lower cost per token versus competitors.

2. Vera Rubin will have 7 components: Vera CPU, Rubin GPU, NVLink 6 switch, ConnectX-9 SuperNIC, BlueField-4 DPU, Spectrum-6 Ethernet switch, and Groq 3 LPU. Vera CPUs expected to be a standalone product offering in data centres.

3. Third generation LP30 LPU developed with Groq is shipping starting 3Q26. LPUs expected to be key product for agentic AI.

4. Spectrum X switch which incorporates co-packaged optics is in production for scale-up. Both optical and copper interconnects expected to remain essential.

5. Next-generation Feynman GPU will include a new Rosa CPU, LP40 from Groq, BlueField-5 DPU, and Kyber interconnects supporting both copper and co-packaged optics for scale-up.

6. Launched NemoClaw, an open source platform developed with OpenClaw creator Steinberger for enterprise deployment.

7. Continued expansion by Nvidia in autonomous self-driving (Drive, Alpamayo), robotics (Jetson, Isaac), agentic AI (Nemotron), and space-based data centers (Space-1 Vera Rubin).

[Blue Snoopy @BeagleJournals]

Bank of America increased its 2026 forecast for investment-grade debt sales by hyperscalers by 25% to $175 billion, with an expectation of $65 billion in new issuance expected this year.

[Blue Snoopy @BeagleJournals]

OpenAI has reorganized its infrastructure leadership as it pivots its Stargate strategy toward renting more AI servers rather than building its own data centers. - The Information

[Blue Snoopy @BeagleJournals]

@FransBakker9812 Yes sir 🫡

[Blue Snoopy @BeagleJournals]

@litigious_dulce Thank you very much for your invaluable insights Dulce!