DVCon U.S.

The premier conference for functional design and verification of today's semiconductor integrated circuits.

[DVCon U.S. @dvcon_us]

🎯 After record-breaking attendance in 2026 and a sold-out exhibit hall two years in a row, DVCon U.S. 2027 is continuing to expand, with a larger exhibit hall and more opportunities designed for attendees and sponsors.

🔗 Contract by January 15, 2027: https://t.co/vud804fDV1

[DVCon U.S. @dvcon_us]

🏆 Congratulations to the DVCon U.S. 2026 Hackathon winners for their strong performance and problem-solving skills!

🥇 Rafid Ahmed Jukaku
🥈 Felix Dube
🥉 Zili Fang

🔗 https://t.co/FLjlZ23dI5

#eda #designverification #soc #integratedcircuits

[DVCon U.S. @dvcon_us]

DVCon U.S. 2026 was a record-breaking success with tremendous growth, including 1,243 attendees from 29 countries. Thank you to our incredible community! Read the full press release here https://t.co/7tSWUPvo13 #DVCon_US #Accellera #EDA #AI #Design #Verification

[DVCon U.S. @dvcon_us]

🌟 DVCon U.S. 2026 has officially wrapped!

Thank you to our sponsors, exhibitors, and attendees for contributing to a successful event.

We look forward to seeing you in 2027.

🔗 Visit the website for onsite photos and award information: https://t.co/keyM01IKnJ

[DVCon U.S. @dvcon_us]

Congratulations to the 2026 Stuart Sutherland Best Paper & Poster Award winners at DVCon U.S.!

Best Paper Award: Properly Introducing Python to your UVM Testbench

Best Poster Award: plusargs++: Make Plusargs Great … Like They Never Were Before

🔗 https://t.co/sLootI91qo

[DVCon U.S. @dvcon_us]

📢 Save the Date - DVCon U.S. 2027 is returning to Santa Clara, CA!

🗓️ March 1-4, 2027

Stay tuned for updates as we prepare for another exciting conference!

#EDA #DesignVerification #SoC #IntegratedCircuits

[DVCon U.S. @dvcon_us]

Meet SmartDV at DVCon U.S. to discuss Design IP and Verification IP for next-generation SoCs.

From early architecture planning to RTL integration and verification, SmartDV helps teams move faster with flexible IP and hands-on technical support.

https://t.co/nSY3SH41O6

[DVCon U.S. @dvcon_us]

✨ Thank you to our Platinum Sponsors for supporting DVCon U.S. 2026! Your partnership fuels innovation in electronic system #designverification.

🔹Chip Agents AI
🔹Cadence
🔹Siemens
🔹Synopsys

🔗 View all of our sponsors and exhibitors: https://t.co/SPuWocdL95

[DVCon U.S. @dvcon_us]

📣 DVCon U.S. 2026: Program Grid Now Available!

📆 Santa Clara, CA | March 2-5, 2026

Discover key insights, hands-on tutorials, and expert-led panels to boost your skills in design and verification.

🔗 Program grid: https://t.co/U4nxSjXtEw
🔗 Register: https://t.co/ZN1zna3NKD

[DVCon U.S. @dvcon_us]

✨ DVCon U.S. 2026: We're excited to welcome Abhi Kolpekwar, Jean-Marie Brunet, and Alon Shtepel as keynote speakers!

They will share insights on: "Verification, Validation, and HW/SW Challenges with Complex Chiplet-based Systems."

🔗 Learn more: https://t.co/P6kfzdZ30m

[DVCon U.S. @dvcon_us]

✨ Thank you to our Notebook Sponsor, Rydev, for supporting DVCon U.S. 2026! Your partnership fuels innovation in electronic system #designverification.

We look forward to welcoming you to Santa Clara, California from March 2-5, 2026.

🔗 Learn more: https://t.co/SPuWocdL95

[DVCon U.S. @dvcon_us]

✨ DVCon U.S. 2026: We're excited to welcome Abhi Kolpekwar and Jean-Marie Brunet from Siemens EDA as keynote speakers!

They will be joined by a customer co-presenter to be announced later.

🔗 https://t.co/P6kfzdZ30m

[DVCon U.S. @dvcon_us]

✨ Happy New Year from DVCon US 2026
Join us on March 2 - 5, 2026, in Santa Clara, CA, for the premier conference on the application of languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits. https://t.co/DPFxhi5CZg

[DVCon U.S. @dvcon_us]

📣 DVCon U.S. 2026 takes place March 2–5, 2026, in Santa Clara, CA, offering a comprehensive program for #designverification professionals.

Flexible registration options available.

Advanced Registration Deadline: January 4, 2026

🔗 Register now: https://t.co/mYV2A08QHI

[DVCon U.S. @dvcon_us]

🎉 Happy Holidays from the Design & Verification Conference & Exhibition (DVCon U.S.)!

We look forward to welcoming you in Santa Clara, CA from March 2-5, 2026.

🔗Learn more: https://t.co/SPuWocdL95

#eda #designverification #soc #integratedcircuits

[DVCon U.S. @dvcon_us]

✨ Thank you to the Stuart Sutherland Best Paper Award Sponsor, AMIQ for supporting DVCon U.S. 2026! Your partnership fuels innovation in electronic system #designverification.

There’s still time to join—sponsor contracts due Jan 16, 2026.
🔗 https://t.co/Hw0hsnz8MC

[DVCon U.S. @dvcon_us]

✨ Thank you to our Gold Sponsors for supporting DVCon U.S. 2026! Your partnership fuels innovation in electronic system #designverification.

🔹AMIQ
🔹Advantest
🔹Moores Lab
🔹Axiomise

There’s still time to join—sponsor contracts due Jan 16, 2026.
🔗 https://t.co/Hw0hsnz8MC

[DVCon U.S. @dvcon_us]

🚀 DVCon U.S. 2026: Connect with top #designverification engineers at the premier conference for #EDA, IP, SoC, and verification tools.

Reserve your space by January 16, 2026 to maximize visibility, expand your network, and grow your customer base.

🔗 https://t.co/lbtGOf6ufL

[DVCon U.S. @dvcon_us]

🦃✨ Happy Thanksgiving from DVCon US 2026! We’re grateful for our incredible community of engineers, researchers, exhibitors, and partners.

Want to learn more about the conference? Visit our website: https://t.co/DPFxhi5CZg

#DVConUS #Thanksgiving #EngineeringCommunity

[DVCon U.S. @dvcon_us]

✨ DVCon U.S. 2026: We're pleased to welcome Stuart Oberman from NVIDIA as a keynote speaker!

Stuart will cover "From Pixels to Tokens: Chip Design and Verification in the Era of AI".

Join us in Santa Clara, CA, USA from March 2-5, 2026.

🔗 Learn more: https://t.co/P6kfzdZ30m