Olivia
Online
FPGAsForBeginners
@HDLForBeginners
I make FPGA videos for beginners!
Joined September 2021
6 Following
38 Followers
2 Posts
New Video! Polynomial window example in SystemVerilog!
https://t.co/b0Pgk2AZCW
@zipcpu Correct the clock name to i_fast_clk or i_slow_clk?
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