HAFLANG - Functional Languages in Hardware

Hardware implementations of high level functional programming languages. Supported by the EPSRC HAFLANG project at Heriot-Watt University (EP/W009447/1).

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Here's a thread with the recorded YouTube talks from our HAFDAL workshop 👇

Starting with...

Carl-Johan Seger (Chalmers University of Technology) - The Cephalopode Project: Creating a low-power IoT device aimed at functional language execution.

https://t.co/wxJHTjqY07

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Our new paper: Ouros, a processor for lazy functional languages based on combinators. Its pipeline overcomes inherent sequentiality of graph reduction, its collector is concurrent and verified. It's up to 118% faster than our earlier KappaMutor processor.

https://t.co/oBYuYeb1qC

[HAFLANG - Functional Languages in Hardware @HaflangProject]

A new slide about the collapse of the LISP machine market around 1987:

https://t.co/sXDaw26DNo

[HAFLANG - Functional Languages in Hardware @HaflangProject]

We've curated a 100 year history of functional language hardware architectures. From 1924 to 2023.

This animated timeline is best viewed on a desktop or laptop.

https://t.co/2i4rBp2A5y

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Yukang Xie is presenting his research at TFP 2025 in Oxford. Draft paper title: "KappaMutor: A Compact Structured Combinator Processor for Haskell"

Yukang is a PhD student on our EPSRC HAFLANG project.

[SDF @sdf_pubnix]

Symbolics 3620 and LMI Lambda #lisp machines #vintage #ai @ComputerHistory

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Some active and recent graph reduction projects, which implement functional programming languages directly in custom hardware.

A slide from Craig Ramsay's HAFLANG seminar talk at Chalmers University today.

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Craig Ramsay is giving a project talk "Hardware Architectures for Lazy Functional Programming, Revisited" at SPLS at the University of Glasgow, 6th November.

https://t.co/IYCtMt3zQr

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Yukang Xie, a new PhD student on this HAFLANG project, is investigating processor design for functional languages. His background is dataflow architectures for cryptography, and has developed an interest in functional languages and their implementations.

https://t.co/1H3NpGpKED

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Our latest paper about Cloaca, an FPGA-based GC that uses hardware-level synchronisation and write barriers to avoid damaging graph reduction performance. We see significantly higher throughput and lower latency compared with a software GC implementation.

https://t.co/WiRSagFtSZ

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Our latest paper about Cloaca, an FPGA-based GC that uses hardware-level synchronisation and write barriers to avoid damaging graph reduction performance. We see significantly higher throughput and lower latency compared with a software GC implementation.

https://t.co/WiRSagFtSZ

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Our paper "Cloaca: A Concurrent Hardware Garbage Collector for Non-Strict Functional Languages" has been accepted to the Haskell Symposium 2024.

It combines mark-and-sweep tracing with one-bit reference counting. It runs concurrently to the mutator, both implemented in hardware.

[HAFLANG - Functional Languages in Hardware @HaflangProject]

@GregMichaelson1 If ACM permitted unicode in metadata, that would've been the title 🙂

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Our paper "Cloaca: A Concurrent Hardware Garbage Collector for Non-Strict Functional Languages" has been accepted to the Haskell Symposium 2024.

It combines mark-and-sweep tracing with one-bit reference counting. It runs concurrently to the mutator, both implemented in hardware.

[HAFLANG - Functional Languages in Hardware @HaflangProject]

@GregMichaelson1 It's this aspect of the work that we're most proud of. λ → 💩

[HAFLANG - Functional Languages in Hardware @HaflangProject]

"Calculateur Fonctionnel" - A great name for a French functional architecture.

We appreciate the nod to recursion, with the display unit in the display unit in the...

From "A Functional Data-flow Architecture Dedicated to Real-time Image Processing", Sérot et al., PACT'93.

[Rob Stewart @robstewartUK]

Real functional programmers code in SK.

CC @GregMichaelson1
origin: Matthew Naylor, adapted from Chris Kania.

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Our IFL paper presents a processor for non-strict functional languages. By avoiding complex CPU circuitry and compiler indirections, it performs 6 times more reductions per cycle than GHC, competing with a 4.7GHz Intel CPU despite clocking at only 193MHz.

https://t.co/FsmFys1v4t

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Here's the workshop's web page:

https://t.co/aRzuv2sdAV

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Here's a thread with the recorded YouTube talks from our HAFDAL workshop 👇

Starting with...

Carl-Johan Seger (Chalmers University of Technology) - The Cephalopode Project: Creating a low-power IoT device aimed at functional language execution.

https://t.co/wxJHTjqY07

[HAFLANG - Functional Languages in Hardware @HaflangProject]

Here's the YouTube playlist for the workshop talks:

https://t.co/LUdxum1z8J