This has been an absolutely brutal month for the Kospi. Here’s how I read it as an engineer/speculator:
SK’s earnings aren’t noise they’re a preview of the whole sector and what’s coming for other companies earnings. It’s clear that the revenue miss is due to the memory mix shifting from DRAM to HBM, and that’s dragging blended ASP growth down. Counterintuitively, HBM pricing has been roughly flat while DRAM has gone vertical. This means every bit share HBM takes is a bit share that isn’t compounding. This is why I’ve said time and again that most of the memory makers’ earnings growth has come from DRAM, not HBM.
Why is this?
Well It takes ~3 DRAM wafers to make one equivalent HBM wafer, kinda like how in Minecraft you need three bushels of wheat to make one loaf of bread 🥖. The HBM demand thus eats commodity DRAM supply and drives that price up. That’s why SK was comfortable adding DRAM capacity because worst case, they convert it to HBM and everybody wants that shit.
This dynamic has been well known for a while and has been why for the longest time people have been memory and chill maxxers the math just worked out beautifully. But what I missed and I think many others did is that there is one flaw here. Because all else being equal, more HBM PER ACCELERATOR actually means less DRAM demand despite the cannibalization dynamics to make HBM. Everyone would prefer more HBM on each chip if they could and all the roadmaps point to that.
H100s shipped with 80 GB of HBM, b200 with 148GB, and Rubin is ramping with 288 GB as standard or 1.5x the HBM of Blackwell. Those extra HBM bits come out of DRAM’s share of bits. The reason is pretty simple, we aren’t using DDR because we want to it’s cause we have to. Ask any engineer if they could put 1TB of HBM on every accelerator, they would do that rather than spec more server DDR. Every roadmap points to more HBM per accelerator and thus more bits migrating to that tier. Whether we can package it is the open question because past 8-high stacks it’s gets hard.
So in summary, rational actors are moving bits off extortionately priced DRAM, up to HBM and down to flash. Although flash offload is still mainly a Chinese lab thing, i just mention it to point out that it’s coming and is going to squeeze DRAM from both sides.
SK’s LTAs & were timed perfectly and should mask falling spot prices for the near term. Longer term, every new generation of accelerator should shift more bits onto HBM and that’s going to hurt the commodity DRAM players who can’t make good quality HBM like Micron. Looks like SK knew what they were doing the whole time and it looks like they timed the top perfectly with their ADR issuance.
Let me know what you think of this bubblicious model by commenting below ! 👇