Matthew Wu

I like building power electronics and RF PCBs. Currently working at @gravityrv and @GastronomousCa. Compeng @ UWaterloo.

[Parsa Ahmadnezhad @parsaxa]

starting off the term with good chai and good people ❤️🫖

@aayanr07 @anirudhbv_ce @Matthew_Wu_

[Nengjia Li @nengjiali]

I spent 4 brutal months building a full Stereo Visual SLAM system from scratch in C++17 + CUDA.

NO pre-made libraries. NO black-box magic.

I just wanted to understand the underlying mechanics behind SLAM.

Here’s the intuitive breakdown
(the full SLAM pipeline, the math that almost broke me, and the real KITTI footage)👇

cc @aelluswamy your work in this space is a massive inspiration for tackling this from absolute scratch

[Matthew Wu @Matthew_Wu_]

The hardest part was building the control loop entirely from scratch with no controller IC, requiring ramp generation, loop compensation, comparator based PWM modulation, error amplification, and isolation.

Designing for compliance and real-world use meant thinking about startup, transformer behavior, loop stability, protection, filtering, and EMC from the beginning.

That was the whole point of the project, to learn power electronics and control loops from the ground up.

[Matthew Wu @Matthew_Wu_]

A mains-powered isolated phone charger that I designed fully from discrete analog logic:

- Offline isolated flyback topology, 15W of USB output
- Custom discrete type II compensation loop
- Compensated for 62° phase of margin and 12 dB of gain margin
- Schmitt trigger integrator ramp generator + comparator-based PWM control
- Designed for IEC 62368-1/CISPR compliance

[ani @anirudhbv_ce]

pip install turboquant-gpu

5.02x KV cache compression for ANY GPU (RTX, H100, A100, B200)

- works over @huggingface transformers

- dead-simple API: compress + generate in 3 lines

- 3-bit Lloyd-Max fused KV compression (0.98 cosine similarity)

- outperforms MXFP4 (3.76x) and NVFP4 (3.56x) on compression

Ran Mistral-7B: 1,408 KB → 275 KB KV cache (5.02x)

Quickstart: https://t.co/7Arml3at79

Written in cuTile (CUDA 12, 13) with PyTorch fallbacks

[Matthew Wu @Matthew_Wu_]

v2 fixed a lot of what v1 got wrong.

Some changes:
- Removed a ground plane split that was hurting signal integrity
- Cleaned up placement to reduce via usage on UART / comms lines
- Removed unnecessary jumpers
- Added proper pull-up / pull-down resistors for stability

Nothing flashy, but small mistakes add up and can quietly ruin a board

[Matthew Wu @Matthew_Wu_]

My 6-axis robotic arm controller PCB that I designed back in high school.

The v2 specs:
- 4-layer board, 12A max current
- Dual ESP32 + STM32 integration
- Custom op-amp servo feedback
- Optimized for thermals & signal integrity
- Fully validated

But getting to this point wasn't easy. I learned a lot the hard way.

v1 had major signal integrity issues that forced me to cut traces, add bodge wires, and do a ton of messy rework just to get basic functionality.

But that board forced me to learn:
power distribution, spacing, layout discipline, and hot loop control.

Now that exact stuff is the foundation for the RF + power electronics boards I design at UWaterloo.

[Matthew Wu @Matthew_Wu_]

@zackC_EE @anirudhbv_ce Can relate. Luckily JLC is 3-4 days fast.

[Matthew Wu @Matthew_Wu_]

@aayanr07 Definitely is a prototype!