Qiantong Xu

@GoogleDeepMind | ex-FAIR @MetaAI, @character_ai, @SambaNovaAI

[Logan Kilpatrick @OfficialLoganK]

Introducing Gemini 3.8 Flash, another jump in Gemini's agentic + coding capabilities, and our 3rd updated Flash model in only 6 weeks...

This model has been a ton of fun to work with, excited to see what you all think!

[Qiantong Xu @QiantongX]

"The hardware only needs to guarantee that the upper bound is high enough and that the semantics are clear enough to be searchable, and then finding the path that reaches that upper bound turns from a compiler research problem into a search compute problem."

[Zartbot @zartbotF]

OpenAI Jalapeno deep div analysis , I believe someone should forward to @JensenHuang :)

https://t.co/XVAAPe0bNM

[fin @fi56622380]

https://t.co/Wrfh9lUhOa

[Logan Kilpatrick @OfficialLoganK]

Introducing Gemini 3.7 Flash : )

- it is fast!
- 50% lower price than 3.6 flash (through end of year)
- strong intelligence increase in only ~3 weeks (thanks to some awesome algorithmic improvements)
- available in the API, AI Studio, Antigravity, and more!

[Google DeepMind @GoogleDeepMind]

We’re dropping Gemini Omni: our first step towards a model that can create anything from anything - starting with video.

It combines Gemini’s intelligence with our generative media systems - representing a leap forward in world understanding, multimodality, and editing 🧵

[fin @fi56622380]

AI Semiconductor Endgame 2026 (Part 1)

New Token Economics Computing Paradigm Shifts from GPU Compute to HBM

This article starts from the essence of GPU architectural evolution to address a question the market has long worried about:

Why must each GPU's HBM memory demand grow exponentially, and why won't this exponential growth in HBM demand stall?

It then derives the first principle of token economics under the current architecture: token throughput = HBM size × HBM BW (bandwidth)

It also discusses why the GPU ceiling is determined by HBM's two dimensions of progress.

The topic of HBM cyclicality has long been controversial. Optimists argue that AI-driven demand is much greater than before, but the market mainstream still believes that previous up-cycles also saw 20%+ annual demand growth — so what's different this time? AI doesn't change the fact that HBM, like traditional DRAM, has commodity attributes. Once capacity expansion at the demand peak meets a downturn, history will repeat itself. We can take the perspective of compute-chip architecture, start from first principles, and unpack and reason through this question:

why this time is genuinely different.

———————————————————————————————

History: The Era of CPU Compute

For a very long time, we lived in the era of CPU-dominated compute. The CPU's top-level KPI was performance — running faster — and so each generation of CPUs deployed every method imaginable to push benchmark scores higher. First it was rising clock frequencies, then it was architectural evolution: superscalar designs, and so on.

During this period, why didn't DDR need to advance technologically at high speed? DDR3 to DDR5 took a full 15 years.

Because in this era, DDR's role was purely auxiliary — and only weakly so. By industry experience, even doubling DDR speed would generally only raise CPU performance by less than 20%.

Why did improvements in DDR bandwidth and speed matter so little? Two reasons:

1. CPUs designed all kinds of architectural tricks to hide DDR latency — superscalar designs, wider issue widths, massive ROBs and register renaming to extract parallelism and hide latency, L1 caches, L2 caches — all of which weakened the demand for DDR bandwidth and speed.

2. CPU workloads don't have particularly demanding bandwidth requirements. For most everyday workloads — say, opening a webpage — DDR bandwidth is severely overprovisioned. Even cloud workloads often look the same.

In other words, in the CPU era, DDR bandwidth and speed didn't really matter. There was virtually no difference between DDR4 and DDR5 except in a handful of games — and even the JEDEC standard advanced slowly.

On top of that, only a small portion of any given app needs to permanently sit in DDR. Whatever is needed can be paged in from the hard drive on demand. App size grew slowly, and so DDR capacity demand grew slowly as well.

That's why, over the past decade, the average PC went from 7–8GB of DDR to about 23GB — only 3× growth in ten years.

This slow upgrade pace directly affected revenue. Capacity-based pricing was the main way of making money; speed improvements were just a technological upgrade that raised the unit price of capacity. With both of these dimensions advancing slowly, growth could only come from increases in PC/phone unit volumes.

So along both dimensions — bandwidth/speed and capacity — DRAM was always a “nice-to-have” appendage to the chip industry. The marginal utility of DDR upgrades was very low, and almost completely disconnected from the CPU era's top-level KPI.

———————————————————————————————

The Paradigm Shift: GenAI's Top-Level KPI

When we entered the era of GenAI large models, the computing paradigm shifted, and the top-level KPI changed fundamentally.

By the time GPUs evolved into AI inference engines, the top-level KPI was no longer compute alone (TOPS/FLOPS), as it had been for CPUs — it became the cost of a token. Specifically: overall token throughput per unit cost / per unit power.

A close second is token throughput speed — because in the agent era, many tasks have become serial, and token output speed has become a critical bottleneck for user experience.

This is exactly why Jensen invented the concept of the AI factory: to produce the most tokens at the lowest cost, while pushing token throughput speed as high as possible.

In the AI training era, Jensen's economics were TCO (Total Cost of Ownership): the more GPUs you buy, the more you save.

In the inference era, Jensen's token economics flip the logic:

AI inference has very healthy gross margins, so the logic now becomes: the NVIDIA GPU is the GPU that produces the cheapest token in the world, so the more you buy, the more you earn.

The top-level KPI has become a Pareto frontier: along the two dimensions of token throughput and token speed, optimize as far as possible.

Each generation of NVIDIA's token factory is essentially pushing the entire Pareto frontier up and to the right. This is the most important KPI of the AI inference era.

———————————————————————————————

From Token Throughput to HBM: The Core Logic Chain

Below is the most important logical chain of this article: how to start from the exponential growth of token throughput and derive that the ceiling bottleneck lies in the exponential growth of HBM size and HBM speed.

In the era of single-GPU inference with single-thread batch size = 1, token throughput had only one dimension: HBM bandwidth speed. Higher bandwidth = higher token throughput.

But once we entered the NVL72 era, inference is no longer single-GPU. It is a system-level token factory composed of 72 GPUs + 36 CPUs, designed to fully saturate HBM bandwidth and compute simultaneously, in pursuit of the ultimate token throughput.

Token throughput growth depends on two things: the number of requests batched simultaneously × the average token speed per request.

That is: batch size × token speed.

Take Rubin NVL72 as an example. At an average token speed of 100 tokens/s, processing 1,920 simultaneous requests yields a token throughput of 192,000 tokens/s. A Rubin NVL72 draws roughly 120kW (0.12MW), so per MW it can handle 1.6M tokens/s.

So we need to find ways to push both parameters up: batch size and average token speed. Their product is our top-level KPI — token throughput.

Parameter 1: Batch growth — bottleneck is HBM size

Every request in the batch carries its own KV cache, which has to live in HBM, with sizes ranging from a few GB to tens of GB. Because hot KV cache must be read at high frequency and high speed at any moment, it must reside in HBM. For a model with, say, 80 layers, every token generation step requires reading the KV cache 80 times from HBM.

As batch size grows, hot KV cache grows linearly.

And because the hot KV cache for every request in the batch must sit in HBM, HBM size must grow linearly with batch size.

Like an airport shuttle bus: the gate wants to move passengers to the plane as fast as possible. If HBM size is small, the shuttle is small, so you have to make extra trips.

Conclusion: batch size growth bottlenecks on HBM size growth.

Parameter 2: Average token speed per request — bottleneck is HBM bandwidth

The decode-phase speed of a large model bottlenecks on HBM bandwidth, because every token generated requires reading the activated weights and KV cache many times over.

The emergence of LPUs has, in cases where batch size isn't very large, moved the activated weights portion onto SRAM — but every generated token still requires many reads of the KV cache from HBM. The higher the HBM bandwidth, the faster each token is generated, in essentially linear correspondence.

Like the airport shuttle bus: HBM bandwidth is like the width of the door — wider doors mean passengers board faster.

The rest of the GPU's configuration is essentially adapted to support batch growth and to keep token compute speed in step with HBM growth. In some cases the GPU even spends excess compute to recover effective bandwidth (e.g., bandwidth compression techniques).

—-------

To return to the shuttle bus analogy:

• Shuttle bus cabin size = HBM Size (capacity): determines how many passengers can fit at once (i.e., how many requests' KV caches can sit in HBM simultaneously). Bigger cabin = more passengers (higher batch size) per trip. If the bus is too small, moving 100 people takes two trips — and total throughput suffers.

• Shuttle bus door width = HBM Bandwidth: determines how fast passengers get on and off. A wide door, and everyone piles on at once (decode/token generation is fast). A narrow door, and even with a giant cabin, people queue up and most of the time is spent boarding.

• Passenger throughput = cabin size × door-width-determined boarding speed.

—-------

At this point, we've logically derived the first principle of token-economics hardware demand:

Token throughput = HBM size × HBM Bandwidth

The top-level KPI of the AI inference era is highly dependent on progress along both HBM dimensions.

If we want to maintain 2× token throughput growth per generation, that means each generation of single GPU must grow HBM size × HBM BW speed by 2×!

This is the first time in history that HBM memory size can influence the top-level KPI — token throughput.

To validate this thesis, we can put NVIDIA's token throughput from A100 to Rubin Ultra on the same chart as HBM size × HBM BW speed.

What you find is that the two curves track each other startlingly closely on log axes.

HBM size × speed actually grows even faster than token throughput — which makes sense, because HBM defines the ceiling, and in practice utilization of that ceiling is very hard to push to 100%. Even if HBM size × HBM speed grew by 1,000×, with the supporting compute and architecture, it would be very hard to wring out the full 1,000× of headroom.

This curve isn't a coincidence — it's the necessary solution of system optimization.

throughput = batch × speed. This is the unavoidable first principle of token factory economics.

—-------

What about software? Won't software optimization reduce bandwidth demand? Reduce HBM demand?

This is an independent dimension from hardware. It's like asking: if software on a CPU runs faster after optimization, does that mean the CPU doesn't need to advance for ten years? After all, software is faster now.

If that were the case, would CPU vendors still make money? For a CPU vendor to survive, there's only one path: in standardized benchmarks, ignoring software optimization, every new CPU generation must score higher — otherwise it doesn't sell.

GPUs are exactly the same. How well software is optimized, and the requirement that the GPU's own token-throughput KPI must improve dramatically every year, are two separate things.

As long as token demand keeps growing, the pursuit of higher token throughput will not stop — and so neither will the pursuit of higher HBM size × HBM speed.

If HBM size and HBM speed were to slow down, Jensen would personally fly to the Big Three and pressure them to accelerate, because that ishis GPU ceiling. If the ceiling stops rising, can his GPU still sell?

Of course, NVIDIA also needs to wrack its brains to extract performance beyond the HBM ceiling through heterogeneous architectural angles. The LPU is a great example — it improved the Pareto frontier substantially from a different angle (the right-hand high-token-speed portion).

—--------------------

HBM memory has now bid farewell to that old era of drifting with the tide. On this one-way road paved by exponential demand, it has, in something close to a destined fashion, walked onto the central stage of the industry's epic.

When the inference paradigm's first principles evolve to this point, as long as Jensen still wants to sell GPUs, HBM must double — and it must double every generation. This is endogenous pressure from the supply side. It has nothing to do with AI demand, nothing to do with macro cycles, and nothing to do with the moods of the hyperscalers.

The only remaining question is this:

When demand has been physically locked into exponential growth, will the three players on the supply side — like they have for the past thirty years — once again drag themselves back into the mire of the cycle by their own hands?

[Noam Shazeer @NoamShazeer]

Last week we upgraded Gemini 3 Deep Think. Today, we’re shipping the core intelligence that makes those breakthroughs possible: Gemini 3.1 Pro.
A noticeably smarter, more capable baseline for your hardest challenges.
Available now: https://t.co/Srm2Ec7OWJ

[Demis Hassabis @demishassabis]

Official results are in - Gemini achieved gold-medal level in the International Mathematical Olympiad! 🏆 An advanced version was able to solve 5 out of 6 problems. Incredible progress - huge congrats to @lmthang and the team! https://t.co/pp9bXF7rVj

[Google AI Developers @googleaidevs]

🔊Native audio outputs in Gemini 2.5 give developers new ways to build richer applications with conversation and speech. ↓
https://t.co/U4MX3q65SN

[Google DeepMind @GoogleDeepMind]

Last year, we introduced Project Astra: a research prototype exploring capabilities for a universal AI assistant. 🤝

We’ve been making it even better with improved voice output, memory and computer control - so it can be more personalized and proactive. Take a look ↓ #GoogleIO

[Google DeepMind @GoogleDeepMind]

We’re releasing an updated Gemini 2.5 Pro (I/O edition) to make it even better at coding. 🚀

You can build richer web apps, games, simulations and more - all with one prompt.

In @GeminiApp, here's how it transformed images of nature into code to represent unique patterns 🌱

[Google AI @GoogleAI]

Congratulations to Neil Zeghidour, Alejandro Luebs, Ahmed Omran, Jan Skoglund, and Marco Tagliasacchi for winning the IEEE Best Paper Award for "SoundStream: An End-to-End Natural Audio Codec"! https://t.co/5C9HuwYFjJ #SPSAwards #IEEEAwards

[Google DeepMind @GoogleDeepMind]

We’re launching Project Astra capabilities in Gemini Live ✨

Chat with @GeminiApp about anything you see 👀 by sharing your phone’s camera or screen during conversations. ↓

[Noam Shazeer @NoamShazeer]

Introducing Gemini 2.5 Pro Experimental.

The 2.5 series marks a significant evolution: Gemini models are now fundamentally thinking models.

This means the model reasons before responding, to maximize accuracy -- and it’s our best Gemini model yet.

Blog - https://t.co/Gx35wlkomq

[Google DeepMind @GoogleDeepMind]

Get personal with @GeminiApp’s newest capability. ✨

Powered by our Gemini 2.0 Flash Thinking Experimental model, it can analyze your Search history with your permission to better understand interests and give more helpful answers. 🔍 https://t.co/xNp1K6zFEw

[SambaNova @SambaNovaAI]

🏎️⚡️Ka-chow⚡️ The fastest DeepSeek-R1 671B on SambaNova Cloud — running at 198 t/s!

✅3X faster & 5X more efficient than the latest GPUs
✅Running on 1 rack efficiently (16 RDUs)
✅Hosted in secure US data centers
✅100X the global capacity by the end of 2025

@deepseek_ai #AI

[Qiantong Xu @QiantongX]

@tydsh Why do you think gradient descent is the problem?

[SambaNova @SambaNovaAI]

📣 Announcing the world’s fastest AI platform

SambaNova Cloud runs Llama 3.1 405B @ 132t/s at full precision

✅ Llama 3.1 405B @ 132 tokens/sec
✅ Llama 3.1 70B @ 570 tokens/sec
✅ 10X Faster Inference than GPUs

Start developing #FastAI ➡️ https://t.co/QbFzfh48mQ

@AIatMeta

[Character.ai @character_ai]

AI Chat just got real.

Introducing Character Calls, the latest addition to our suite of Voice features. Talk with AI Characters, just like you would talk on the phone. Whether it's polishing your language skills, acing interviews, adding zest to RPGs, or crafting epic storylines, Characters are ready to answer your call.

Try it now on our mobile app: https://t.co/Mw8n4y8WCJ #CharacterCalls

[SambaNova @SambaNovaAI]

TECHNICAL UPDATE: We are excited to share our work on how to enable OSS to become effective tool manipulators. https://t.co/qxChPkxC7A

The benchmarks, leaderboard, and tuned models are available on @huggingface. 🔗⬇️
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