Semiconductor Engineering

Deep Insights For The Tech Industry
#semiconductor #semiEDA #AI #embedded #verification #lowpower #test #DataAnalytics #automotive #chipdesign #ICmanufacturing

[Semiconductor Engineering @SemiEngineering]

Scaling Data Movement For Physical AI https://t.co/e51cnQKrUz
#PhysicalAI #chiplets #CPU #datamovement
#chiplets @arteris_noc #coherency #semiconductor

[Semiconductor Engineering @SemiEngineering]

Agentic workloads increase CPU demand, while reasoning models, MoE architectures, and reservoir computing fuel AI acceleration.
https://t.co/P8Av3YPDBv
#CPU #GPU #AgenticAi #semiconductor

[Semiconductor Engineering @SemiEngineering]

Semiconductor fabs are leveraging AI/ML models & raw equipment data to speed up yield learning, but the volume of data they are collecting is forcing some tough decisions about optimization versus context.
https://t.co/8XaaI7xf83
#semiconductor #fabs

[Semiconductor Engineering @SemiEngineering]

Why Open-Weight AI Matters https://t.co/A7Xst3Tbv6
Proprietary models still hold the edge, but open-weight models add more flexibility for deploying AI.
#openweightAImodels #AImodels #AI

[Semiconductor Engineering @SemiEngineering]

Special Report: Why Physical AI Is So Hard To Engineer
https://t.co/QNoZyv7hQ8
#physicalAI #sensors #chipdesign

[Semiconductor Engineering @SemiEngineering]

Fab expansion accelerates; China advances memory & EUV; Teradyne’s test deal; SEMICON West & OCP highlights; 3D SiP; TSMC & ASML signals; 300mm fab spending; optical & 3nd D-compute startups funding; quantum HW ... https://t.co/kxJqQrZBSm
#semiconductor #lithography #DRAM

[Semiconductor Engineering @SemiEngineering]

Larger packages, finer routing, and embedded functions are pushing advanced substrates toward application-specific designs.https://t.co/TkMlDXsQ9L
#semiconductor #substrates #advancedpackaging #GlassSubstrates

[Semiconductor Engineering @SemiEngineering]

Fab expansion accelerates; China advances memory & EUV; Teradyne’s test deal; SEMICON West & OCP highlights; 3D SiP; TSMC & ASML signals; 300mm fab spending; optical & 3nd D-compute startups funding; quantum HW ... https://t.co/kxJqQrZBSm
#semiconductor #lithography #DRAM

[Semiconductor Engineering @SemiEngineering]

80 chip industry-related startups raised $8.5B in Q3, with big hauls by companies tackling data movement and memory. https://t.co/lF752H8FLY
#semiconductor #startupfunding

[Semiconductor Engineering @SemiEngineering]

@Synopsys CEO Sassine Ghazi talks about AI agents, the limits of autonomous engineering, digital twins, and the challenges facing 3D-ICs.
https://t.co/0HxEzb5vTB
#AgenticAI #semiEDA #3DIC #digitaltwins #semiconductor

[Semiconductor Engineering @SemiEngineering]

Semiconductor fabs are leveraging AI/ML models & raw equipment data to speed up yield learning, but the volume of data they are collecting is forcing some tough decisions about optimization versus context.
https://t.co/8XaaI7xf83
#semiconductor #fabs

[Semiconductor Engineering @SemiEngineering]

CPO Testing Faces A Moving Target Problem
https://t.co/XtwZAvBNDW
Test vendors adapt to changing connector architectures & extreme alignment tolerances as CPO heads toward mainstream

#CPO #CPOtest #NPO @Teradyneinc #Advantest
@aseglobal @Keysight #semiconductor #datacenter

[Semiconductor Engineering @SemiEngineering]

No single test, inspection, model, or monitoring technique provides a complete view of an advanced device. Each has physical, spatial, temporal, or contextual blind spots. https://t.co/SxQlN1na7Y
#semiconductor

[Semiconductor Engineering @SemiEngineering]

80 chip industry-related startups raised $8.5B in Q3, with big hauls by companies tackling data movement and memory. https://t.co/lF752H8FLY
#semiconductor #startupfunding

[Semiconductor Engineering @SemiEngineering]

Latest: $2B foundry pact; hyper-NA EUV; TSMC, Samsung $; Canon's nanoimprint; AI chips under scrutiny; $10T data center buildout; $1.5B SiC boost; chip smuggling; 800V power; quantum HW scales up; mobile fab... https://t.co/T0ocrpg9BJ
#semiconductor #semiEDA

[Semiconductor Engineering @SemiEngineering]

The shift from software-defined to AI-defined vehicles raises questions about whether the hardware can keep up.
https://t.co/KoOcmNOzdG
#automotive #SDVs #AIdefinedvehicles

[Semiconductor Engineering @SemiEngineering]

Increasing power density makes heat, stress, and aging harder to predict, and more critical to address earlier in the design. Part 2.
https://t.co/WmO10ovt1R
#semiconductor #photonics #thermal #AIchips

[Semiconductor Engineering @SemiEngineering]

Latest: $2B foundry pact; hyper-NA EUV; TSMC, Samsung $; Canon's nanoimprint; AI chips under scrutiny; $10T data center buildout; $1.5B SiC boost; chip smuggling; 800V power; quantum HW scales up; mobile fab... https://t.co/T0ocrpg9BJ
#semiconductor #semiEDA

[Semiconductor Engineering @SemiEngineering]

No single test, inspection, model, or monitoring technique provides a complete view of an advanced device. Each has physical, spatial, temporal, or contextual blind spots. https://t.co/SxQlN1na7Y
#semiconductor

[Semiconductor Engineering @SemiEngineering]

The imec report: Towards scalable sCFET standard cell architectures: split-gate devices, a 5T+1 CFET SRAM bit cell, and improved back-end-of-line routability [Part 2] https://t.co/oJmovlWVNE
#CFETs @imec_int #semiconductor #sCFETs #mCFET #SRAM