NotAlwaysNot

[NotAlwaysNot @VBxFOX]

@jaykihn0 @promptingman is RZL designed to work with NV GPU tile ?

[NotAlwaysNot @VBxFOX]

@jaykihn0 @promptingman is perf real ? do not seems much higher than 285K

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@jaykihn0 @Dangerman1337 @promptingman https://t.co/7jWCtwHRwQ

[NotAlwaysNot @VBxFOX]

@jaykihn0 @promptingman thx, so that imply that hardening core for specific process (AW-E for N2P and N2X, or GE-E for N2* and A1*) is easier than expanding core by IP (more IPC, instructions), right ?

[NotAlwaysNot @VBxFOX]

@jaykihn0 @promptingman what unified means for diff between P and E cores ?

[NotAlwaysNot @VBxFOX]

@ghost_motley Maybe NVL is cancelled and accelerated RZL (18A tiles), that will use NVL stuff, similar to MTL-S -> ARL switch

[NotAlwaysNot @VBxFOX]

@jaykihn0 @mayemayey Thx for exp..n :) Then what's diff AW-LP from AW-E, not counting process and L3 ?

[NotAlwaysNot @VBxFOX]

@mayemayey @jaykihn0 core march is highly dependant on process, and SoC is N3 or maybe N4, so it may be previous march (ARL, LNL, PTL) march but enhanced

[NotAlwaysNot @VBxFOX]

@jaykihn0 no U9 8P16E then ? ARL-R config copy ?
look weak for IPC growth

[NotAlwaysNot @VBxFOX]

@jaykihn0 Why Intel is so lazy ? AMD can do multiple CPU (Epyc, Ryzen, many APU), GPU (desktop, mobile, several console) and NPU on time, while you are promote constant delays, cancellations, mistakes and finally bad looking products, while having larger design teams. Shame on you

[NotAlwaysNot @VBxFOX]

@jaykihn0 @theclub386 @BaronOfOndol @MarsMarsTitan no E-cores ?

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@jaykihn0 @kopite7kimi @326powah @VideoCardz QUIZ:8+16 on 1:18A|2:N2|3:BOTH|4:SECRET

[NotAlwaysNot @VBxFOX]

@jaykihn0 @326powah @c0ll0bu AVX512 ?

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@InstLatX64 Thanks for remind. That oneDNN (GH) main page state NVL with AVX10.2, so this doc is lacking that info

[NotAlwaysNot @VBxFOX]

@jaykihn0 Better add few ARM cores, to speed up Android emulators

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@meng59739449 It is fake. Two compute tiles combined smaller than ARL compute tile. Nor 18A and N2 allow for such high density

[NotAlwaysNot @VBxFOX]

@jaykihn0 @326powah @9550pro NVL with AVX10[P-512 bit] and APX ?

[NotAlwaysNot @VBxFOX]

@jaykihn0 P-only based on Raptor or other cores ?