Albert Reuther

father, parallel computing geek, cyclist, saxophonist, Purdue Boilermaker, MIT Fighting Engineer, and a bunch of other stuff.

[Albert Reuther @areuther1]

Thank you, @JeffreyBrown, for a wonderful interview with @YoYo_Ma at @PurdueConvos today. It was a beautiful conversation with music that I found inspiring. Also, thank you for acknowledging @PurdueBands marching and alumni bands who bring arts and fun together. Boiler Up!

[Albert Reuther @areuther1]

Call for papers is open for the 4th Interactive and Urgent HPC Workshop (WIUHPC) at #HPC
@Supercomputing
#SC24. CFP: https://t.co/tnIbK7S6lu

[Albert Reuther @areuther1]

@jarsivaud @jdongarra We all know he is a linear algebra Jedi!

[Albert Reuther @areuther1]

@JohnDonker And then you go on to discuss posits ...

[Albert Reuther @areuther1]

@missmulrooney Aw, man! He really raised the bar for day trip Dad's theme songs.

[Albert Reuther @areuther1]

@glennklockwood Also software defined radio, though I would tuck that under the signal processing category.

[Albert Reuther @areuther1]

@glennklockwood Large scale signal processing (particularly adaptive signal processing).

[Albert Reuther @areuther1]

@MATLAB That is super cool!

[MATLAB @MATLAB]

Have you tried it yet?

Download the code to play chess in MATLAB 👉 https://t.co/bS5agYednB

#coding #getcode #programming

[Albert Reuther @areuther1]

Getting ready for today’s (Wednesday) Interactive and Urgent HPC BoF in Room 607 from 12:15 to 1:15 MST at #SC23 @NickBrownHPC

[Albert Reuther @areuther1]

@glennklockwood Huge congratulations to KAUST and Cerebras! "AI Accelerator" should be considered a marketing term. Yes, the architecture is good for AI, but the architecture should be called a programmable dataflow accelerator or massive micro-core mesh accelerator.

[Albert Reuther @areuther1]

@science_dot @glennklockwood @HPC_Guru @SamPartee @MickeyShaughnes If you are referring to parallel global address space (PGAS) languages, then yes, it has a future in certain parallel computing communities. But doesn't Chapel/PGAS use MPI under the hood?

[Albert Reuther @areuther1]

@HPC_Guru Yup, still Twitter to me. Perhaps X is just an alternate spelling or abbreviation for Twitter ...

[Albert Reuther @areuther1]

@0xartu @mnoukhiya Highly optimized, yes, and also mathematically rigorous and extensively verified from years/decades of use.

[Albert Reuther @areuther1]

@mnoukhiya Fortran is the original DSL for science and math. Perhaps we should call it a MSL - math specific language!

[Albert Reuther @areuther1]

The Interactive and Urgent HPC workshop is underway at @ISChpc with a keynote from Silvina Grad-Freilich from @MathWorks.

[Albert Reuther @areuther1]

I will be giving a virtual seminar tomorrow Friday, April 7, as part of the Computational Research in Boston and Beyond (CRiBB) seminar series. The topic is AI Hardware Accelerators Survey. More details here: https://t.co/gpzLihV0aJ

[Albert Reuther @areuther1]

@thoefler @ProfMatsuoka What about posits?

[Albert Reuther @areuther1]

@glennklockwood Join us at the NIST HPC Security Workshop, March 15-16, 2023: https://t.co/ezOVTM3U0C

[Albert Reuther @areuther1]

@glennklockwood The SC22 workshop, on which this article is based, covered a wide range of HPC security topics, and many approaches were shared. It was a lively discussion, and it's not surprising that it sounds like a bunch of voices from different perspectives.

[Albert Reuther @areuther1]

@glennklockwood The NIST/NSF effort, on the other hand, is focused on finding the commonalities - the "typical" - among HPC deployments so that NIST can provide guidance to secure each of the four function zones and systems as a whole.