x

[Mathematica @mathemetica]

Data structures scale by adding dimensions. A scalar is a single number. A vector is a one-dimensional array that can be a row of shape 1×3 or a column of shape 3×1. A matrix is a two-dimensional array of numbers arranged in rows and columns. A tensor is a multi-dimensional array with three or more dimensions.

Neural network training processes batches of multi-channel images as 4D tensors in convolutional models for object recognition.

[Greg Brockman @gdb]

voice makes you feel just how unnatural it is to type

[Morlex @0xMorlex]

Every AI engineer should hear what Andrej Karpathy said:

Most people use LLMs without understanding what happens between the prompt and the answer.

That works, until the model hallucinates or confidently gives the wrong answer.

In this 32-minute lecture, Karpathy explains the full pipeline:

tokenization + pretraining + transformers + inference + fine-tuning

1.6B parameters. 100B training tokens. 1,024-token context. 1 token predicted at a time.

You’ll understand more about how LLMs actually work than most people do after a $500 AI course.

[slash1s @slash1sol]

A TEAM JUST DEPLOYED 15 AUTONOMOUS LOOP AGENTS FROM A SINGLE PROMPT USING APPLIED GRAPH ENGINEERING

Most developers still manually hardcode multi agent systems, writing separate logic for every individual task.

Graph engineering changes this by using a central topological map to spin up all 15 nodes simultaneously.

A single 200 word input generates the architecture, routing 120 unique pathways between agents instantly.

Instead of failing under conflicting instructions, these loop agents self correct via continuous state sharing.

Managing a 15 node mesh requires high token throughput, making this dependent on strict low-] latency API tiers.

See exactly how this automated multi agent graph architecture actually operates in real time ↓

[Philosophy Of Physics @PhilosophyOfPhy]

Visualization of Maxwell’s equations.

Showing electric flux from charge, divergence-free magnetic fields, electromagnetic induction, displacement current, and coupled electric and magnetic fields propagating through vacuum as light.

[John Carmack @ID_AA_Carmack]

Sometimes I look out over a body of water and think about pixel shaders — superimposed waveforms, fresnel effects, intra-pixel maximum finding and analytical anti-aliasing. In the age of gen-AI rendering, this is like the old mechanics working on WW2 era piston planes. A craft of a prior era.

[Akshay 🚀 @akshay_pachaar]

CPU vs GPU vs TPU vs NPU vs LPU, explained visually:

5 hardware architectures power AI today.

Each one makes a fundamentally different tradeoff between flexibility, parallelism, and memory access.

> CPU

It is built for general-purpose computing. A few powerful cores handle complex logic, branching, and system-level tasks.

It has deep cache hierarchies and off-chip main memory (DRAM). It's great for operating systems, databases, and decision-heavy code, but not that great for repetitive math like matrix multiplications.

> GPU

Instead of a few powerful cores, GPUs spread work across thousands of smaller cores that all execute the same instruction on different data.

This is why GPUs dominate AI training. The parallelism maps directly to the kind of math neural networks need.

> TPU

They go one step further with specialization.

The core compute unit is a grid of multiply-accumulate (MAC) units where data flows through in a wave pattern.

Weights enter from one side, activations from the other, and partial results propagate without going back to memory each time.

The entire execution is compiler-controlled, not hardware-scheduled. Google designed TPUs specifically for neural network workloads.

> NPU

This is an edge-optimized variant.

The architecture is built around a Neural Compute Engine packed with MAC arrays and on-chip SRAM, but instead of high-bandwidth memory (HBM), NPUs use low-power system memory.

The design goal is to run inference at single-digit watt power budgets, like smartphones, wearables, and IoT devices.

Apple Neural Engine and Intel's NPU follow this pattern.

> LPU (Language Processing Unit)

This is the newest entrant, by Groq.

The architecture removes off-chip memory from the critical path entirely. All weight storage lives in on-chip SRAM.

Execution is fully deterministic and compiler-scheduled, which means zero cache misses and zero runtime scheduling overhead.

The tradeoff is that it provides limited memory per chip, which means you need hundreds of chips linked together to serve a single large model. But the latency advantage is real.

AI compute has evolved from general-purpose flexibility (CPU) to extreme specialization (LPU). Each step trades some level of generality for efficiency.

The visual below maps the internal architecture of all five side by side.

Notice the thread connecting all five. Every generation exists to move data less, because the math was never the hard part. Feeding the math units fast enough is.

The same battle plays out one layer up in software. During LLM inference, a single GPU produces terabytes of KV cache per day, and nearly all of it gets thrown away and recomputed, which is a big reason agent workloads cost what they do.

I wrote a full breakdown of how a disaggregated caching layer fixes this, with up to 14x faster time-to-first-token. The article is quoted below.

You should also check the @lmcache GitHub repo: https://t.co/TXlaLLu04a

(don't forget to star 🌟)

👉 Over to you: Which of these 5 have you actually worked with or deployed on?

[Google Gemma @googlegemma]

Gemma 4 just crossed 300 million downloads.

Thank you to the developers, researchers, and open-source community building with us. Your work and feedback drive this project forward.

Let's keep building!

[S.T.E.M Explorer @stemexplor]

This Al blackboard is going viral at China's World Artificial Intelligence Conference

[Electrical Knowledge @electric_4u]

How to Identify Components on a Circuit Board

[Unitree @UnitreeRobotics]

Unitree Super Athlete AS2-W 😉
Fluid movement, compact yet exceptional. Supports a continuous 16kg payload, with 30+ km unloaded driving range

[Philosophy Of Physics @PhilosophyOfPhy]

In 1926, Erwin Schrödinger introduced the equation that became the dynamical law of non-relativistic quantum mechanics:

iℏ ∂ψ/∂t = [−ℏ²/(2m)∇² + V]ψ

It does not describe a particle following one definite path. It describes how the wavefunction evolves and therefore how the probabilities of possible experimental outcomes change with time.

[x @bun1000]

@bckupacc99 lol

[Elon Musk @elonmusk]

It is a thoughtful framework overall and certainly a good starting point for discussions

[x @bun1000]

Marshmello - Alone (Streex Remake) [Monstercat Official Music Video] https://t.co/H1adcSIpd2 via @YouTube

[Machine Learning Street Talk @MLStreetTalk]

One of the most exciting new AI companies is @SakanaAILabs in our opinion. Their CTO and their Co-founder @YesThisIsLion Llion Jones is now saying it's time to move beyond transformers even though he was one of the 8 original inventors at Google.

They are now investigating the next significant step forwards, and have a NeurIPS 2025 spotlight paper called "continuous thought machines" (CTM) which may well be just that (first author @LearningLukeD).

They just landed their Series B, with the legendary @hardmaru as their CEO. They are actively investigating neuroevolution approaches which I strongly believe will be a big part of the future of AI -- and they publish their research in the open.

Keep an eye on Sakana! 👌

Interview with Llion and Luke dropping today on MLST.

[Machine Learning Street Talk @MLStreetTalk]

https://t.co/lQADcvGBpE check out their blog post and paper "Continuous Thought Machines" -- @LearningLukeD first author.

[x @bun1000]

The Most Gen Z Man in the World - Dos Equis Ad https://t.co/gnMngIYVgY via @YouTube

[x @bun1000]

Ninajirachi - Infohazard (Official Video) https://t.co/y2Yx7t6tc8 via @YouTube

[x @bun1000]

"The Lie" by Sir Walter Raleigh (read by Tom O'Bedlam) https://t.co/SMjKiEFBRN via @YouTube