Check out the @chipflow_io very early alpha! We are dedicated to building the best user experience possible to build custom ICs. It’s early days and *your* input is important.
In this great post by @y__ we follow his journey of implementing a #RISCV CPU with Amaranth #HDL.
Some great background on using #FPGAs for science, and his challenges and successes while following @BrunoLevy01 's excellent Blinker to RISCV guide.
https://t.co/Tl1sQQ7OYA
#TinyTapeout 3 closed on Monday, and I've been putting together the statistics and getting the datasheet built.
We had 100 submissions (25% from universities) and I filled the remaining space with 149 designs submitted to TinyTapeout 2.
This week @robtaylor78, CEO of @chipflow_io joins me from #stateofopencon#SOOCon23 to chat about about the intersection between open source software design and hardware design and more.
The Business of Open Source: https://t.co/udSTePcHWt
We are happy to announce @Google as a sponsor for @LatchUpConf in Santa Barbara, CA March 31 to April 2! Thank you for your support of free and open source silicon.
For more information about the event, visit https://t.co/kMbLS70ZHR Catch up at Latch-Up!
It's Valentine's day, so let's bring some love to you all with a new edition of El Correo Libre https://t.co/8I66CBzdbr This time we have the new FOSSi toolchain from @QuickLogic_Corp, @mhosseinaskari's NNA called BARVINN, @antmicro's NVMe ML accelerator and much more. Enjoy!
.@robtaylor78, CEO at @chipflow_io, will be taking us on a journey, setting out the history of this rapidly growing ecosystem of open source semiconductor design and the commercial applications. Head to the Open Hardware room now!
New guest post by @suarezvictor and @pipelinec_hdl!
In this article we present a tool flow that takes C++ code describing a raytraced game, and produces digital logic that can be implemented in off-the-shelf #FPGA with no hard or soft CPU used.
https://t.co/UZzjT7Ho8N
And thanks to @matthewvenn for helping me prepare some of the content! Have a look at his Zero to ASIC course and the Tiny Tapeout project if you are looking for a guided way into the world of ASIC development.
Great to see so many people interested in Free and Open Source Silicon at #FOSDEM2023! https://t.co/SOZtZSuK9n will have the slides and the recording soon. If you haven't done so, subscribe to El Correo Libre (https://t.co/mlY5bCt6Su) to keep in touch with the community.
My first ever paper was accepted to ISCAS 2023. It's a fully opensource neuromorphic chip.
Download the paper:
https://t.co/vn6H9y7M4g
Checkout the repository:
https://t.co/mrvbR0XunE
Special thanks to @mguthaus and @jasoneshraghian, co-authors of this work.
This week @matthewvenn of the Zero To ASIC Course returns to The Amp Hour to talk about what has been happening in the world of #OpenSource#Silicon, both the tools that make things go and the projects that people are creating.
https://t.co/8qtW1Jk7CN
Place and Route is the #ASIC terminology of the week!
https://t.co/3zbjaJYeas
In the last month, Place and Route has been the 18th most popular out of 42 terms.