Today we announced the ratification of the @risc_v base ISA and privileged architecture specifications, marking a milestone for the growing RISC-V ecosystem. Learn more: https://t.co/ISM8SxzyAv
Last week, SiFive announced its new office in Silicon Hills! Check out the details in this article by @nicolecobler at @statesman. https://t.co/JAOip3D4D4
The @EuProcessor Initiative plans to develop a low-power microprocessor using @risc_v architecture for exascale supercomputers, data centers and the automotive market. Read more: https://t.co/V2f3hXdSpr
To continue to fuel the mass adoption of the @risc_v ISA, @SiFive is expanding into the metropolitan Portland area to provide local support to @SiFive customers. Read more: https://t.co/Ehw0L81yJN
Putting everything together. Project: VerilogBoy (8bit GameBoy compatible SoC + PicoRV32 RISC-V controller), Hardware: Pano Logic G1 #FPGA thin client, Game: Tobu tobu girl by @TangramGames . Game running on the VerilogBoy core, USB host stack and file system running on the RV.