We are excited to share AnvilHDL (accepted at #ASPLOS26), a hardware description language with a type system that prevents a common class of bugs (which we call timing hazards) without sacrificing expressiveness for low-level control. Try it online: https://t.co/jyNjIr6Z03
We are excited to share AnvilHDL (accepted at #ASPLOS26), a hardware description language with a type system that prevents a common class of bugs (which we call timing hazards) without sacrificing expressiveness for low-level control. Try it online: https://t.co/jyNjIr6Z03