SK Hynix ex-vice president comments
"China is headed for a dead end after Phase 1b without EUV."
"The real gap lies in Big Tech collaboration experience and problem-solving capabilities."
"The gap between Chinese and Korean memory companies is estimated to be over five years in DRAM, and two to three years in NAND. The gap in DRAM, in particular, is likely to widen further."
"It's possible to sustain Phase 1a without EUV using multi-patterning. In fact, Micron has successfully achieved mass production using this method," he said. "However, it will be virtually impossible to achieve Phase 1b without EUV."
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China's memory makers abandon low-price strategy: DRAM, NAND near Korean levels
Recent market speculation has claimed that China's memory producer CXMT is triggering a price war by offloading DDR4 at deep discounts. Supply chain sources, however, said CXMT has largely pivoted to DDR5 process development, keeping only around 10,000 wafers of DDR4 capacity for a handful of long-term customers, making large-scale, low-priced dumping into the open market unlikely.
Pricing strategy shift
Aligned with China's supply chain localization drive, domestic memory leaders CXMT and YMTC have steadily raised prices in recent years, with products now nearing or even surpassing levels set by South Korean rivals. Sources indicate that meaningful new capacity from both companies is unlikely to ramp up before 2027.
CXMT has historically lagged international DRAM peers in gross margin due to process maturity and yield challenges, but the recent recovery in DRAM pricing has materially improved profitability. In the third quarter of 2025, its average gross margin climbed to 35%, sharply reducing quarterly losses. With the industry entering a new upcycle in the second half of 2025, full-year net profit is now forecast at CNY2–3.5 billion (US$288–504 million), well ahead of earlier projections that placed profitability in 2026 or 2027.
DDR5 advancement
Sources said CXMT launched its latest DDR5 products in November 2025, delivering speeds up to 8,000 megabits per second and single-die capacities of 24gigabits, with mass production yields and performance continuing to improve. Rising DDR5 and LPDDR5 prices have lifted average selling prices, directly supporting revenue growth.
With CXMT preparing for an IPO, industry sources said there is little rationale to redirect resources back to DDR4 production. Under policy guidance, the company is expected to continue advancing toward higher-end DRAM processes. As DDR4 moves into end-of-life status, a large-scale return to DDR4 manufacturing is viewed as increasingly improbable.
Sources added that CXMT will allocate roughly 10,000 wafers of DDR4 capacity to its strategic investor GigaDevice Semiconductor. From the first quarter of 2026, the company will further cut its remaining in-house DDR4 output from around 20,000 wafers to 10,000 wafers, serving only long-term customers. With the production window short, internal DDR4 inventories are now almost exhausted.
Market rumors recently suggested CXMT was selling 32GB DDR4 modules at roughly 30% of prevailing market prices. Downstream module makers rejected the claims, saying the market remains firmly seller-led, where even a 10% discount would quickly clear inventory. Supported by strong domestic demand, Chinese memory suppliers have largely exited their former low-price strategy, now pricing in line with market levels or even above South Korean competitors.
Tight memory supply persists despite capacity expansion
Pricing trends are already reflecting the shift, sources said. SK Hynix is quoting around US$20 for 1-terabit NAND wafers in January 2026, while YMTC is reportedly pricing at US$21 to US$21.5 in certain channels, indicating Chinese suppliers are already commanding premiums in specific markets.
While SK Hynix's official pricing is lower, its conservative allocation strategy often leaves buyers short of requested volumes. YMTC, though slightly more expensive, is able to meet procurement targets, with supply reliability compensating for the price difference.
Though CXMT and YMTC are accelerating DRAM and NAND expansion, industry observers said full ramp-up will take time. YMTC's Phase 3 fab in Wuhan may begin operations in 2026 if construction remains on track, but significant NAND output is not expected until 2027, with part of the capacity allocated to DRAM development and production.
CXMT is also expanding its Shanghai fab, with total capacity projected to reach two to three times that of its Hefei base. Sources noted the cleanroom was only recently completed, while equipment installation and process tuning have yet to start. Export controls continue to constrain expansion, with tool installation unlikely before the second half of 2026 and volume production expected in 2027.
Industry analysts said that although China's memory makers are scaling up rapidly and could eventually approach global leaders in size, current supply tightness appears structural, with shortages unlikely to ease materially through 2026 and 2027.
As AI applications continue to expand, demand for DRAM and NAND is expected to rise further, closely linking the memory industry's long-term growth to AI adoption.