engineers@work

Website:

[engineers@work @engineerswork1]

picoZ80 powered MZ-1500 BASIC now has network drives. Using the virtualised Celestite LAN card and a network file server via USB LAN and WiFi.

[engineers@work @engineerswork1]

Sharp MZ-2500 fully operational with the picoZ80, in physical or virtual modes. Added virtual (or physical pass-thru) SASI MZ-1E30 (SASIxBluePill) driver.

[engineers@work @engineerswork1]

Test program, to the Z80 the board is real.

;--------------------------------------------------------------------------------------------------------
;- Celestite LAN Board — Network Stress Test
;- All output on MZ-1500 screen (VRAM D000-D3FF). Loops continuously.
;- Also mirrors summary to debug port (50h).
;--------------------------------------------------------------------------------------------------------

PORT_DBG EQU 050h
PORT_MR EQU 060h
PORT_AR0 EQU 061h
PORT_AR1 EQU 062h
PORT_DR EQU 063h
PORT_PING EQU 067h

CMD_OPEN EQU 001h
CMD_CLOSE EQU 010h
ST_ESTAB EQU 017h
ST_CLOSED EQU 000h

TPSTART EQU 010F0h
MEMSTART EQU 01200h
VRAM EQU 0D000h
VL EQU 40

ORG TPSTART
ATRB: DB 001h
NAME: DB "CELESTITE STRESS", 0Dh
SIZE: DW MEND - MEMSTART
DTADR: DW MEMSTART
EXADR: DW MEMSTART
COMNT: DS 104

ORG MEMSTART

START: LD SP, 01180h
;- Init W5100.
LD A, 080h
OUT (PORT_MR), A
LD A, 003h
OUT (PORT_MR), A
;- Write gateway IP to GAR.
XOR A
OUT (PORT_AR0), A
LD A, 001h
OUT (PORT_AR1), A
LD A, 192
OUT (PORT_DR), A
LD A, 168
OUT (PORT_DR), A
LD A, 1
OUT (PORT_DR), A
LD A, 1
OUT (PORT_DR), A

LD HL, 0
LD (LOOPCNT), HL

;- ============================================================
MAINLP: ;- Clear text VRAM only (D000-D3E7, 1000 bytes).
LD HL, VRAM
LD BC, 1000
CLR: LD (HL), 000h
INC HL
DEC BC
LD A, B
OR C
JR NZ, CLR

LD HL, (LOOPCNT)
INC HL
LD (LOOPCNT), HL

;- Line 0: Title.
LD HL, VRAM
LD DE, S_TITLE
CALL PVRAM

;- Line 1: Loop count.
LD HL, VRAM + VL
LD DE, S_LOOP
CALL PVRAM
LD A, (LOOPCNT+1)
CALL PHEXV
LD A, (LOOPCNT)
CALL PHEXV

;- ---- PING (line 3) ----
LD HL, VRAM + VL*3
LD DE, S_PING
CALL PVRAM
XOR A
OUT (PORT_PING), A
LD B, 250
PNGW: PUSH BC
IN A, (PORT_PING)
POP BC
CP 0FFh
JR NZ, PNGGOT
LD DE, 12000
PNGD: DEC DE
LD A, D
OR E
JR NZ, PNGD
DJNZ PNGW
LD HL, VRAM + VL*3 + 28
LD DE, S_TOUT
CALL PVRAM
JR PNGDN
PNGGOT: LD HL, VRAM + VL*3 + 28
CALL PDECV
LD DE, S_MS
CALL PVRAM
PNGDN:

;- ---- TCP CONNECT (line 4) ----
LD HL, VRAM + VL*4
LD DE, S_TCP
CALL PVRAM
;- Close.
LD A, 004h
OUT (PORT_AR0), A
LD A, 001h
OUT (PORT_AR1), A
LD A, CMD_CLOSE
OUT (PORT_DR), A
;- Mode = TCP.
LD A, 004h
OUT (PORT_AR0), A
XOR A
OUT (PORT_AR1), A
LD A, 001h
OUT (PORT_DR), A
;- Dest IP.
LD A, 004h
OUT (PORT_AR0), A
LD A, 00Ch
OUT (PORT_AR1), A
LD A, 192
OUT (PORT_DR), A
LD A, 168
OUT (PORT_DR), A
LD A, 1
OUT (PORT_DR), A
LD A, 1
OUT (PORT_DR), A
;- Port 80.
LD A, 004h
OUT (PORT_AR0), A
LD A, 010h
OUT (PORT_AR1), A
XOR A
OUT (PORT_DR), A
LD A, 80
OUT (PORT_DR), A
;- OPEN + CONNECT.
LD A, 004h
OUT (PORT_AR0), A
LD A, 001h
OUT (PORT_AR1), A
LD A, CMD_OPEN
OUT (PORT_DR), A
LD A, 004h
OUT (PORT_AR0), A
LD A, 001h
OUT (PORT_AR1), A
LD A, 004h
OUT (PORT_DR), A
;- Wait.
LD B, 250
TCPW: PUSH BC
LD A, 004h
OUT (PORT_AR0), A
LD A, 003h
OUT (PORT_AR1), A
IN A, (PORT_DR)
POP BC
CP ST_ESTAB
JR Z, TCPOK
CP ST_CLOSED
JP Z, TCPFL
LD DE, 20000
TCPD: DEC DE
LD A, D
OR E
JR NZ, TCPD
DJNZ TCPW
TCPFL: LD HL, VRAM + VL*4 + 28
LD DE, S_FAIL
CALL PVRAM
JP HTTPDN
TCPOK: LD HL, VRAM + VL*4 + 28
LD DE, S_PASS
CALL PVRAM

;- ---- HTTP GET (line 5) ----
LD HL, VRAM + VL*5
LD DE, S_HTTP
CALL PVRAM
;- Reset TX pointers (TX_RD=0, TX_WR=0 at 0x0422-0x0425).
LD A, 004h
OUT (PORT_AR0), A
LD A, 022h
OUT (PORT_AR1), A
XOR A
OUT (PORT_DR), A ; TX_RD high = 0.
OUT (PORT_DR), A ; TX_RD low = 0.
OUT (PORT_DR), A ; TX_WR high = 0.
OUT (PORT_DR), A ; TX_WR low = 0.
;- Write request to TX buffer.
LD A, 040h
OUT (PORT_AR0), A
XOR A
OUT (PORT_AR1), A
LD HL, HTTPREQ
HTTPWR: LD A, (HL)
OR A
JR Z, HTTPWD
OUT (PORT_DR), A
INC HL
JR HTTPWR
HTTPWD: LD DE, HTTPREQ
OR A
SBC HL, DE
LD A, 004h
OUT (PORT_AR0), A
LD A, 024h
OUT (PORT_AR1), A
LD A, H
OUT (PORT_DR), A
LD A, L
OUT (PORT_DR), A
;- SEND.
LD A, 004h
OUT (PORT_AR0), A
LD A, 001h
OUT (PORT_AR1), A
LD A, 020h
OUT (PORT_DR), A
;- Poll RX_RSR.
LD B, 250
HTTPRW: PUSH BC
LD A, 004h
OUT (PORT_AR0), A
LD A, 026h
OUT (PORT_AR1), A
IN A, (PORT_DR)
LD H, A
IN A, (PORT_DR)
LD L, A
POP BC
LD A, H
OR L
JR NZ, HTTPGOT
LD DE, 20000
HTTPRD: DEC DE
LD A, D
OR E
JR NZ, HTTPRD
DJNZ HTTPRW
LD HL, VRAM + VL*5 + 28
LD DE, S_TOUT
CALL PVRAM
JP HTTPDN

HTTPGOT: ;- Show hex count on line 5.
PUSH HL
LD HL, VRAM + VL*5 + 28
POP DE
LD A, D
CALL PHEXV
LD A, E
CALL PHEXV
LD DE, S_BYT
CALL PVRAM

;- Read HTTP response and display on screen lines 7-24 (18 lines).
LD A, 060h
OUT (PORT_AR0), A
XOR A
OUT (PORT_AR1), A
LD HL, VRAM + VL*7
LD C, 200 ; Max bytes to display.
HTDISP: IN A, (PORT_DR)
CP 00Dh
JR Z, HTNXT ; Skip CR.
CP 00Ah
JR Z, HTNL ; LF = new line.
;- Convert and write to VRAM.
PUSH HL
PUSH DE
CALL A2DSP
POP DE
POP HL
LD (HL), A
INC HL
JR HTCHK
HTNL: ;- Advance to next 40-char line. Round HL up to next VL boundary.
;- New HL = ((HL - VRAM + VL) / VL) * VL + VRAM.
PUSH DE
LD DE, VRAM
OR A
SBC HL, DE ; HL = offset from VRAM.
LD A, L
ADD A, VL
JR NC, HTNL2
INC H
HTNL2: LD L, A
;- Round down to VL boundary: offset = (offset / 40) * 40.
;- Approximate: clear low bits. 40 = 8*5, not power of 2. Use division.
;- Simple: subtract (offset mod 40). Use repeated subtraction.
LD A, L
LD E, A
LD A, H
LD D, A
HTNL3: LD A, D
OR A
JR NZ, HTNL4
LD A, E
CP VL
JR C, HTNL5
HTNL4: LD A, E
SUB VL
LD E, A
JR NC, HTNL3
DEC D
JR HTNL3
HTNL5: ;- E = offset mod 40. Subtract from HL.
LD A, L
SUB E
LD L, A
JR NC, HTNL6
DEC H
HTNL6: LD DE, VRAM
ADD HL, DE
POP DE
JR HTCHK
HTNXT: ;- Just consumed CR — skip, don't advance.
HTCHK: ;- Bounds check.
LD A, H
CP 0D4h
JR NC, HTEND
DEC C
JR NZ, HTDISP
HTEND:
;- RECV confirm.
LD A, 004h
OUT (PORT_AR0), A
LD A, 001h
OUT (PORT_AR1), A
LD A, 040h
OUT (PORT_DR), A

HTTPDN: ;- Close socket.
LD A, 004h
OUT (PORT_AR0), A
LD A, 001h
OUT (PORT_AR1), A
LD A, CMD_CLOSE
OUT (PORT_DR), A

;- Debug port summary.
LD HL, DBGLP
CALL PSTR
LD A, (LOOPCNT+1)
CALL PHEX
LD A, (LOOPCNT)
CALL PHEX
LD HL, DBGCR
CALL PSTR

;- Delay ~1 second at 3.54MHz (2 × 65535 × 26T ≈ 0.96s).
LD B, 2
DLY1: LD DE, 0FFFFh
DLY2: DEC DE
LD A, D
OR E
JR NZ, DLY2
DJNZ DLY1

JP MAINLP

;--------------------------------------------------------------------------------------------------------
;- PVRAM: Write null-terminated ASCII string at DE to VRAM at HL. Returns HL advanced.
;--------------------------------------------------------------------------------------------------------
PVRAM: LD A, (DE)
OR A
RET Z
PUSH HL
PUSH DE
CALL A2DSP
POP DE
POP HL
LD (HL), A
INC HL
INC DE
JR PVRAM

;--------------------------------------------------------------------------------------------------------
;- PDECV: Print A as decimal to VRAM at HL. Advances HL.
;--------------------------------------------------------------------------------------------------------
PDECV: PUSH BC
LD B, 0
PVD100: CP 100
JR C, PVD10
SUB 100
INC B
JR PVD100
PVD10: PUSH AF
LD A, B
OR A
JR Z, PVD10N
ADD A, 020h
LD (HL), A
INC HL
PVD10N: POP AF
LD B, 0
PVD10L: CP 10
JR C, PVD1
SUB 10
INC B
JR PVD10L
PVD1: PUSH AF
LD A, B
OR A
JR Z, PVD1N
ADD A, 020h
LD (HL), A
INC HL
PVD1N: POP AF
ADD A, 020h
LD (HL), A
INC HL
POP BC
RET

;--------------------------------------------------------------------------------------------------------
;- PHEXV: Print A as 2-digit hex to VRAM at HL.
;--------------------------------------------------------------------------------------------------------
PHEXV: PUSH AF
RRCA
RRCA
RRCA
RRCA
AND 00Fh
CALL PHXN
POP AF
AND 00Fh
PHXN: CP 00Ah
JR C, PHXN1
ADD A, 001h - 00Ah
LD (HL), A
INC HL
RET
PHXN1: ADD A, 020h
LD (HL), A
INC HL
RET

;--------------------------------------------------------------------------------------------------------
;- A2DSP: Convert ASCII in A to MZ display code via table.
;--------------------------------------------------------------------------------------------------------
A2DSP: PUSH HL
AND 07Fh
LD L, A
LD H, 0
LD DE, ATBL
ADD HL, DE
LD A, (HL)
POP HL
RET

;--------------------------------------------------------------------------------------------------------
;- Debug port helpers.
;--------------------------------------------------------------------------------------------------------
PSTR: LD A, (HL)
OR A
RET Z
OUT (PORT_DBG), A
INC HL
JR PSTR

PHEX: PUSH AF
RRCA
RRCA
RRCA
RRCA
AND 00Fh
ADD A, 030h
CP 03Ah
JR C, PH1
ADD A, 007h
PH1: OUT (PORT_DBG), A
POP AF
AND 00Fh
ADD A, 030h
CP 03Ah
JR C, PH2
ADD A, 007h
PH2: OUT (PORT_DBG), A
RET

;--------------------------------------------------------------------------------------------------------
;- Strings (ASCII, null-terminated).
;--------------------------------------------------------------------------------------------------------
S_TITLE: DB "CELESTITE NET STRESS TEST", 0
S_LOOP: DB "LOOP ", 0
S_PING: DB "PING 192.168.1.1", 0
S_TCP: DB "TCP CONNECT GATEWAY 80", 0
S_HTTP: DB "HTTP GET GATEWAY", 0
S_PASS: DB "PASS", 0
S_FAIL: DB "FAIL", 0
S_TOUT: DB "TOUT", 0
S_MS: DB "MS", 0
S_BYT: DB "H", 0

HTTPREQ: DB "GET / HTTP/1.0", 0Dh, 0Ah, 0Dh, 0Ah, 00h

DBGLP: DB 0Dh, 0Ah, "Loop:", 0
DBGCR: DB 0Dh, 0Ah, 0

LOOPCNT: DW 0

;- ASCII to MZ display code table (128 bytes).
ATBL: DB 0CCh,0E0h,0F2h,0F3h,0CEh,0CFh,0F6h,0F7h
DB 0F8h,0F9h,0CDh,0FBh,0FCh,0CDh,0FEh,0FFh
DB 0E1h,0C1h,0C2h,0C3h,0C4h,0C5h,0C6h,0E2h
DB 0E3h,0E4h,0E5h,0E6h,0EBh,0EEh,0EFh,0F4h
DB 000h,061h,062h,063h,064h,065h,066h,067h
DB 068h,069h,06Bh,06Ah,02Fh,02Ah,02Eh,02Dh
DB 020h,021h,022h,023h,024h,025h,026h,027h
DB 028h,029h,04Fh,02Ch,051h,02Bh,057h,049h
DB 055h,001h,002h,003h,004h,005h,006h,007h
DB 008h,009h,00Ah,00Bh,00Ch,00Dh,00Eh,00Fh
DB 010h,011h,012h,013h,014h,015h,016h,017h
DB 018h,019h,01Ah,052h,059h,054h,050h,045h
DB 000h,001h,002h,003h,004h,005h,006h,007h
DB 008h,009h,00Ah,00Bh,00Ch,00Dh,00Eh,00Fh
DB 010h,011h,012h,013h,014h,015h,016h,017h
DB 018h,019h,01Ah,053h,000h,058h,000h,000h

MEND:

[engineers@work @engineerswork1]

MZ-700/MZ-1500 Networking
Virtualised Mr Ishi's Celestite LAN board on the picoZ80 - uses WiFi or NCM (network over USB).
https://t.co/omB3ejZs13
Just need to find software now otherwise I will have to write a driver for BASIC MZ-5Z008 that I disassembled and add a read/write NFS driver or similar.

[engineers@work @engineerswork1]

picoZ80 v2.5a first test in an MZ-1500. Persona created, will look to add virtual MZ-1R23 Kanji board, PIO-3034 320K EMM board, MZ-1R37 640K EMM board and even the Celistite LAN Board (via Wifi/NCM).

[engineers@work @engineerswork1]

Git repo updated with latest code, schematics and pcb files. Release 2.472 files available with many improvements.

[engineers@work @engineerswork1]

Latest update, pico in Black. Minor update but routing redone to limit RF interference (to help pass FCC/RED tests if required).

Latest firmware updates utilise the ESP32 OTG USB network so you can run the web interface without WiFi being present.

[engineers@work @engineerswork1]

MZ-700, MZ-80A and now MZ-2000 Persona's added to the picoZ80. Major changes made, now full ICE debug shell added with improved Z80 physical timing, performance and USB network (web interface).

Video: MZ-2000 running in physical mode with virtual floppy drive.

See documentation @ https://t.co/WEtQYV3x1l.

[engineers@work @engineerswork1]

picoZ80 - first try in an MZ-80A, vanilla mode. Hostile environment with high voltage just above the picoZ80 board (CRT), no issues.
Boots floppy disk drive, boots tape.
Next step, write some persona drivers for virtual floppy, virtual UROM, RFS etc.

[engineers@work @engineerswork1]

picoZ80 repo now on git (https://t.co/gYlYMHbpHR), along with the User Manual (https://t.co/EuHU2rG2GV), Technical Guide (https://t.co/krlK0lrnzQ) and Developers Guide (https://t.co/CW9Fsd6hc0).

Basic and MZ700 Personalities exist, additional persona under development.

[engineers@work @engineerswork1]

This it the twenty-dollar question! My aim is to place the designs/software onto git and it will be open source and people can build as they like. If some Chinese manufacturer got involved they would be very cheap as they are common parts but for 5 off assembled it was costing me ~50GBP each. PCB+parts from Mouser to self-build work out around GBP20, but this is paying top dollar for <10 parts.

[engineers@work @engineerswork1]

https://t.co/6tvP0ba4t7

[engineers@work @engineerswork1]

@r0b0t_sp1der Yep, just busy putting all into git (minus the plethora of temp files)! Probably this w/e or Easter and will be up on git.

[engineers@work @engineerswork1]

I've done both and if I could have got an FPGA small enough with enough BRAM and ALM's, I wouldnt have thought about using the RP2350, glad I didnt as it is a nice device.
I would imagine you could keep redcodes Z80 emulator for an 8080, Z80 is a superset, just need to rewire the PCB for the pin differences and change the PIO's, 2 PIO's sampling the clocks and setting IRQ's which other PIO's pickup to activate the bus cycles.
On my website are past FPGA replacements for the Z80 which work well but they are well oversized and more tailored for the Sharp machines! My last board, https://t.co/ShARZn3Jij is still waiting completion, just need to get a fab to make me one as my own reflow build had many bad bga joints and trying to use a hot air station to fix just compounds the issues.

[engineers@work @engineerswork1]

Yes, I've published the schematics and documentation at https://t.co/WEtQYV3x1l and will soon put the whole software/hardware repo up on git. An 8080 would probably be a bit of work, the pins are in different locations and the clocks/multi-voltage may be tricky, a bit like the pico6502 Im also working on for clock phasing and the multi-voltage shouldnt be an issue as reading the specs, the outputs are >=0v. 8088 should be very possible too, as would the muxed 8086.

[engineers@work @engineerswork1]

The logic thresholds for TTL is 0.8v or below = 0 and >2.0V = 1 - thus driving at 3.3V, so long as the motherboard of the host doesnt have very long PCB lands or many attached devices, you could drop to 2.3V and still see logic 1. Input side is the same, the RP2350 will see 5V as logic 1 which is > 2.0V so fine and < 0.8V as logic 0.
This article gives you a good insight: https://t.co/ZDjFMBGHLp

[engineers@work @engineerswork1]

Documentation on my projects updated at https://t.co/iTCyV5eivk - now includes a Japanese version, translated courtesy of Claude.

Working with Grok for over a year, now switching to Claude due to primary work requirements, I must say Claude is very good. Grok is excellent but not being able to view your code repo or update it is a major limiting factor that I hope xAI address.

Claude has its issues, you need to be topic and programming aware to correct oversights and mistakes, but I hope to use AI more in the future to enhance and further my projects.

[engineers@work @engineerswork1]

It is certainly possible to add ICE functionality, just time! I think the best method would be over a web browser, CLI would be easier to implement as it would operate directly within the RP2350 and finer control but Web based would be more user friendly.

Will give it some thoughts.

[engineers@work @engineerswork1]

New version of picoZ80, v2.5 - adds a USB hub to enable direct connection with the RP2350B and ESP32.

Documentation now at https://t.co/JURJdkthXW - MZ700 persona all but complete, tidying up code base before moving onto the MZ-80A persona.