Digital design is still too locked behind licenses and closed tools.
Modern open-source flows are worth another look.
We wrote about the hardware design stack we use:
https://t.co/EIJlWzJ6yT
#DigitalDesign#OpenSource#ASIC#FPGA
You're probably overcomplicating your testbench.
Model the behavior, enforce standard interfaces, and use lightweight verification libraries. That's it. And it scales.
Check our latest blogpost:
https://t.co/TQNuQy9JAH
#FPGA#DigitalDesign#ASIC#Verification
CRC, Reed-Solomon encoding, PRBS all use the same serial feedback loop underneath.
The trick to running k inputs per cycle isn't pipelining, it's matrix exponentiation.
Check our latest blogpost:
https://t.co/EcjpE1KHI2
#FPGA#DigitalDesign#ASIC
We started HardMatrix to build serious digital hardware: IP cores, ASIC/FPGA systems, and to help create a more open and capable semiconductor ecosystem.
Small team. Deep technical focus. Long-term mission.