#AVX512F - Twitter Hashtag

over 3 years ago

Nice results from this months steam HW survey! #AVX now above 95% market penetration across all steam x86 installs #AVX2 at 90% What's really interesting to me is how #AVX512f is nearly identical to #AVX512VNNI Are we seeing the end of SkylakeX?

FelixCLC_'s tweet photo. Nice results from this months steam HW survey!

#AVX now above 95% market penetration across all steam x86 installs
#AVX2 at 90%
What's really interesting to me is how #AVX512f is nearly identical to #AVX512VNNI

Are we seeing the end of SkylakeX? https://t.co/nXXwycGPYp

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InstLatX64 @InstLatX64

almost 4 years ago

It is #AVX512F, P05, 1 clk.. It so great, thxxxxx!

Tom Forsyth (TODO: fix my heart or die) @tom_forsyth

almost 4 years ago

@pshufb @matt_dz Although if you preload v0 with 0x5555..., v1 with 0x3333..., v2 with 0x0F0F... then in fact it WILL send that 8-bit constant directly in :-) There's just one small hurdle...

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InstLatX64 @InstLatX64

almost 4 years ago

I forgot to mention 2 things: - Thx for the inspiration, @Wunkolo! - VPSRAD/Q is #AVX512F, so it works even on #KnightsLanding https://t.co/S5QBzh8yba

InstLatX64's tweet photo. I forgot to mention 2 things:
- Thx for the inspiration, @Wunkolo!
- VPSRAD/Q is #AVX512F, so it works even on #KnightsLanding
https://t.co/S5QBzh8yba https://t.co/vRVrnDTPOi

InstLatX64 @InstLatX64

almost 4 years ago

I have refreshed the Saturated_AddSub module with #AMD #Zen4 optimized versions: on this CPU the TERNLOG latency depends on the operand order https://t.co/P1pcr23Yit

InstLatX64's tweet photo. I have refreshed the Saturated_AddSub module with #AMD #Zen4 optimized versions: on this CPU the TERNLOG latency depends on the operand order
https://t.co/P1pcr23Yit https://t.co/oh1MGxZO9E

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InstLatX64 @InstLatX64

about 4 years ago

@Wunkolo VFIXUPIMM* is #AVX512F #Zen4 latency is 2 clks

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InstLatX64 @InstLatX64

over 4 years ago

This is my #AVX512F libdivide-based printing idea: not so dense and elegant as the #AVX512IFMA, but it works even on #KnightsLanding, #SkyLakeX, #SkyLakeSP, #CascadeLake, #CooperLake Free source: https://t.co/3WOTSwyyYV

InstLatX64's tweet photo. This is my #AVX512F libdivide-based printing idea: not so dense and elegant as the #AVX512IFMA, but it works even on #KnightsLanding, #SkyLakeX, #SkyLakeSP, #CascadeLake, #CooperLake
Free source:
https://t.co/3WOTSwyyYV https://t.co/QaHDfGLbKj

InstLatX64 @InstLatX64

over 4 years ago

This is my #AVX512IFMA printing idea: how can a VPMADD52LUQ + VPMADD52HUQ pair generate 8 decimal ascii digits? Free source: https://t.co/3WOTSwyyYV

InstLatX64's tweet photo. This is my #AVX512IFMA printing idea: how can a VPMADD52LUQ + VPMADD52HUQ pair generate 8 decimal ascii digits?
Free source:
https://t.co/3WOTSwyyYV https://t.co/yRvFLgmAky

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InstLatX64 @InstLatX64

over 4 years ago

I have implemented 16 versions of the decimal printing function to serve as reference work: - 32 / 64-bit - signed / unsigned - #AVX512IFMA / #AVX512F - intrinsic / assembly all with size- and negative-sign handling.

InstLatX64's tweet photo. I have implemented 16 versions of the decimal printing function to serve as reference work:
- 32 / 64-bit
- signed / unsigned
- #AVX512IFMA / #AVX512F
- intrinsic / assembly
all with size- and negative-sign handling. https://t.co/BWF5DLJcMr

InstLatX64 @InstLatX64

over 4 years ago

I have also implemented a libdivide-based #AVX512F version for the old #KnightsLanding, Cascade-, Cooper- and #SkylakeX, without #AVX512IFMA. It is not such a breakthrough as the IFMA version, but is still faster on SKX than everything else except the 40000B LUT.

InstLatX64's tweet photo. I have also implemented a libdivide-based #AVX512F version for the old #KnightsLanding, Cascade-, Cooper- and #SkylakeX, without #AVX512IFMA. It is not such a breakthrough as the IFMA version, but is still faster on SKX than everything else except the 40000B LUT. https://t.co/dTLjCm80Xf

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InstLatX64 @InstLatX64

over 4 years ago

I have also implemented a libdivide-based #AVX512F version for the old #KnightsLanding, Cascade-, Cooper- and #SkylakeX, without #AVX512IFMA. It is not such a breakthrough as the IFMA version, but is still faster on SKX than everything else except the 40000B LUT.

InstLatX64 @InstLatX64

over 4 years ago

New #AVX512 levels can be useful for everyday tasks too, such as decimal printing. #AVX512IFMA version is not only faster, but it uses just a few cachelines instead of the 40000B LUT. #AMD # Zen4, #Intel #Cannon-, #Ice-, #Tiger-, #Rocket- or proper #AlderLake is required.

InstLatX64's tweet photo. New #AVX512 levels can be useful for everyday tasks too, such as decimal printing.
#AVX512IFMA version is not only faster, but it uses just a few cachelines instead of the 40000B LUT.
#AMD # Zen4, #Intel #Cannon-, #Ice-, #Tiger-, #Rocket- or proper #AlderLake is required. https://t.co/PtaekNTwLc

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InstLatX64 @InstLatX64

over 5 years ago

#Intel Core i7-11700KF (Rocket Lake-S) A0671 CPUID dump (#CypressCove, #AVX512F/CD/BW/DQ/IFMA/VBMI/VBMI2/VNNI/BITALG/VPOPCNTDQ/GFNI/AES/VPCLMUL supported, #AVX512_VP2INTERSECT unsupported) Commit: https://t.co/7vEz7YzH9P

InstLatX64's tweet photo. #Intel Core i7-11700KF (Rocket Lake-S) A0671 CPUID dump (#CypressCove, #AVX512F/CD/BW/DQ/IFMA/VBMI/VBMI2/VNNI/BITALG/VPOPCNTDQ/GFNI/AES/VPCLMUL supported, #AVX512_VP2INTERSECT unsupported)
Commit:
https://t.co/7vEz7YzH9P https://t.co/hVTEgW2O6M

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InstLatX64 @InstLatX64

over 8 years ago

I have uploaded my PopCnt routines: https://t.co/WrBzqzqOon 1, GPR PopCnt (NHM+) 2, #AVX2 (HSW/Carrizo+) 3, #AVX512F (KNL+) 4, #AVX512BW/zmm (SKX+) 5, #AVX512BW/ymm (SKX+) 6, #AVX512_VBMI (CNL+) 7, #AVX512_VPOPCNTDQ (KNM+) 8, #AVX512_BITALG (ICL+) All uses byte granularity

InstLatX64's tweet photo. I have uploaded my PopCnt routines:
https://t.co/WrBzqzqOon
1, GPR PopCnt (NHM+)
2, #AVX2 (HSW/Carrizo+)
3, #AVX512F (KNL+)
4, #AVX512BW/zmm (SKX+)
5, #AVX512BW/ymm (SKX+)
6, #AVX512_VBMI (CNL+)
7, #AVX512_VPOPCNTDQ (KNM+)
8, #AVX512_BITALG (ICL+)

All uses byte granularity https://t.co/SFaxwDHTkm

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InstLatX64 @InstLatX64

over 8 years ago

The #Intel Core i3-8121 SKU is a Cannonlake (CPUID 60663). Probably the i3-8130 is too. Finally the Intel 10nm is working, it explains the 3->4MB L3 and the 3.4GHz Turbo (in case of i3-8130). I hope #AVX512F,CD,BW.DQ,VL,VBMI,IFMA are enabled too https://t.co/FhrokcFXxt

InstLatX64's tweet photo. The #Intel Core i3-8121 SKU is a Cannonlake (CPUID 60663). Probably the i3-8130 is too. Finally the Intel 10nm is working, it explains the 3->4MB L3 and the 3.4GHz Turbo (in case of i3-8130). I hope #AVX512F,CD,BW.DQ,VL,VBMI,IFMA are enabled too

https://t.co/FhrokcFXxt https://t.co/cIyg6QbGTZ

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