Top Tweets for #MRISC32

m @m_bitsnbites

over 2 years ago

@sparsevoxel @romero This is a project I started in 2018, #MRISC32. It inspired the new V16 ISA that I'm currently working on. V16 is not ready for DOOM yet, but rest assured that it will be one of the first programs I'll use for tuning and benchmarking the ISA 😉 See: https://t.co/q0ZqrldPeO

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m @m_bitsnbites

over 2 years ago

Want to run #DOOM. Need something to run it on. ✔️ Develop new CPU ISA. ✔️ Write new GCC backend. ✔️ Implement CPU and VGA gfx in FPGA. ✔️ Write a minimal OS. ✔️ Port DOOM to the new CPU & platform. ✔️ Optimize rendering code. Now I can run DOOM 🤘 @romero #MRISC32 #FPGA

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m @m_bitsnbites

over 2 years ago

Making some progress on optimizing the #Quake2 software renderer for #MRISC32 (running in simulator so far). How it started: 632 frames, 272.2 seconds: 2.3 fps How it's going: 632 frames, 126.8 seconds: 5.0 fps Reducing the resolution to 320x160 makes it ALMOST fluent 😁

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m @m_bitsnbites

over 2 years ago

Okeey! Quake II builds, and runs in the MRISC32 simulator. ...although at painfully slow framerates (and not on the FPGA yet - possibly some memory/buffer-overrun issues?). Optimizations ... may now begin 😎 #FPGA #Quake2 #MRISC32

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m @m_bitsnbites

over 2 years ago

Turns out DXT1 (texture compression format, 4 bpp) was quite easy to implement in my MC1 graphics pipeline. I highly recommend it for hardware with tight memory (in my case, 128KB of video RAM). #FPGA #MRISC32 https://t.co/vEfeYXSS0w

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m @m_bitsnbites

over 3 years ago

Some people still believe that CISC ISAs (x86, z/Arch) have denser machine code than RISC ISAs (#ARMv8 #RISCV #MRISC32). I beg to differ... https://t.co/ENj2m4BRvS

m_bitsnbites's tweet photo. Some people still believe that CISC ISAs (x86, z/Arch) have denser machine code than RISC ISAs (#ARMv8 #RISCV #MRISC32).

I beg to differ...

https://t.co/ENj2m4BRvS https://t.co/XMoKHxhows

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m @m_bitsnbites

about 4 years ago

There we go. Finally! #DOOM running on my custom #MRISC32 based #FPGA computer, and at decent frame rates too (despite the very slow SDRAM, 7-10 cycles/access). With 256KB VRAM, 64MB SDRAM, GCC 13 + newlib, SD-card I/O + FAT filesystem, it can run other things than DOOM, too.

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m @m_bitsnbites

over 4 years ago

The #MRISC32 simulator can now load ELF32 binaries directly (very convenient). https://t.co/5VYIrNUhx9 I borrowed and hacked the ELF loader from https://t.co/BhHfK9JiLj by @BrunoLevy01 (hope you don't mind), and it worked great!

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m @m_bitsnbites

over 4 years ago

Just discovered that @ffmpeg is VERY portable. The whole thing built out-of-the-box for my #MRISC32 CPU (no OS)! Great stuff for measuring instruction frequencies and tuning the compiler back end etc.

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m @m_bitsnbites

over 4 years ago

This is awesome! 🎉 Many thanks to @partouf and @mattgodbolt for helping with bringing #MRISC32 support to #CompilerExplorer !! https://t.co/QrRuNxSwQM

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m @m_bitsnbites

over 4 years ago

Getting started with MRISC32: https://t.co/oskIk8EZ3f #cpu #mrisc32 #programming #fpga

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m @m_bitsnbites

about 5 years ago

Did some optimizations of the Quake core rendering routines (using #MRISC32 vector instructions), and now it runs pretty smoothly in the simulator. https://t.co/uTvDfDuIyz

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m @m_bitsnbites

over 5 years ago

Trying out the MC1 SDK with a simple demo. Video capture from a Cyclone V FPGA. Nice art by @Fc_Arts_ . Bonus points if you recognize the 32x32 font 🙂 https://t.co/gcwkqi7NPz #FPGA #MRISC32 #MC1 #retro #demoscene

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m @m_bitsnbites

over 5 years ago

What to do with the pure-software bit-banging 2 MB/s SD card reader & boot loader of the #MRISC32 based MC1 #FPGA computer? Play an uncompressed version of the #BadApple video of course! (608x456x2bpp @ 30FPS) Boot code: https://t.co/eq1wRcmsPk

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m @m_bitsnbites

over 5 years ago

Success! The MC1 computer can now read from an SD card (first block of the card contains Lorem ipsum as ASCII). #MRISC32 #FPGA

m_bitsnbites's tweet photo. Success! The MC1 computer can now read from an SD card (first block of the card contains Lorem ipsum as ASCII).
#MRISC32 #FPGA https://t.co/jmxw4IvTW1

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m @m_bitsnbites

over 5 years ago

Just in case you missed the glorious MC1/#MRISC32 demo video from the end of 2020, here it is (this time with correct gamma/brightness): https://t.co/3fLQNGCnL0 #FPGA #CPU #demoscene

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m @m_bitsnbites

over 5 years ago

Introduced a new, smarter immediate value encoding for #MRISC32 instructions: 14-bit value plus a hi/lo bit (place value in upper/lower 14 bits of a 32-bit word). Useful for masks and such. Now the copysignf() code generated by GCC is 40% shorter 👍

m_bitsnbites's tweet photo. Introduced a new, smarter immediate value encoding for #MRISC32 instructions: 14-bit value plus a hi/lo bit (place value in upper/lower 14 bits of a 32-bit word). Useful for masks and such. Now the copysignf() code generated by GCC is 40% shorter 👍 https://t.co/BnbWh1opyu

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m @m_bitsnbites

over 5 years ago

MC1: A custom computer with a custom CPU based on a custom ISA https://t.co/gIKrGUgRwf #fpga #mrisc32 #cpu

m_bitsnbites's tweet photo. MC1: A custom computer with a custom CPU based on a custom ISA

https://t.co/gIKrGUgRwf

#fpga #mrisc32 #cpu https://t.co/Y7xlPLYiGB

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m @m_bitsnbites

almost 6 years ago

Finally! #Doom compiling and running in the #MRISC32 simulator! Had to fix a few more #GCC (and Doom) bugs. The GCC toolchain is in a pretty good shape now. @ID_AA_Carmack Thanks for this magnificient piece of code - it's perfect for porting to new platforms!

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m @m_bitsnbites

almost 6 years ago

Not sure if it's the MRISC32 simulator, the GCC or the Doom that is acting up. It's doing something, but it's not exactly right. #MRISC32 #DOOM #cpu #GettingCloser

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