Top Tweets for #Zen5C
The problem with #AMD #Zen6 #Threadripper is that if the CCD
- is classic, as in #Zen4 and #Zen5, then the maximum number of cores is only 4x12=48;
- is dense, then the number of cores can be 128, but with a frequency limit, as in #Zen4c (~3.1 GHz) and #Zen5c (~3.7 GHz);
1/2
The #Zen6-based #AMD #Threadripper is missing from this chart. I don't recall seeing its codename, does it even exist?
#AMD CPUID refresh:
-- CPUID B80F00 is #Zen6 [1]
-- #Zen5c #Sorano CPUID is B10F00 (#EPYC 8005, SP6 socket) [2],[3]
-- #Zen5 #Grado CPUID is B40F40 (EPYC 4005, AM5 socket) [4]
GitHub:
https://t.co/R49g6q19qx
1/2
![InstLatX64's tweet photo. #AMD CPUID refresh:
-- CPUID B80F00 is #Zen6 [1]
-- #Zen5c #Sorano CPUID is B10F00 (#EPYC 8005, SP6 socket) [2],[3]
-- #Zen5 #Grado CPUID is B40F40 (EPYC 4005, AM5 socket) [4]
GitHub:
https://t.co/R49g6q19qx
1/2 https://t.co/NDknvBYzYF](https://pbs.twimg.com/media/G5KDtOYW4AASrKY.png)
New #AMD CPUID dump:
64-Core #ThreadripperPro 9985WX (#ShimadaPeak, #Zen5) B00F81
GitHub:
https://t.co/oGQfXqs32d
While on vacation my colleague @hwl_stegan did review the @AMDRyzen AI 9 HX 370 aka #StrixPoint with #Zen5 and #Zen5c cores @hardwareluxx_de. It’s just a first glimpse into what AMD is offering with the new Zen 5 architecture.
https://t.co/vVzv2Zgg2b
Except the lower frequency and smaller L3, I have found 0.0 difference in #AMD #StrixPoint between #Zen5 (Classic/Normal) and #Zen5c (Dense) cores
Quelles qualités Zen 5 possède-t-il sous son capot ? Hardware & Co vous déchiffre toutes les améliorations de la dernière microarchitecture d'AMD avant même sa sortie par ici !
@AMD_France #Zen5 #Ryzen9000 #Zen5c
https://t.co/tBY6C3z6gc
For the first time in an AMD SoC design, an asymmetrical ratio of L3$ is used. For #StrixPoint AMD is using a Core Complex with four #Zen5 cores and 16 MB L3$ as well as another Core Complex with eight #Zen5c cores and 8 MB L3$.
![InstLatX64's tweet photo. ..and the znver5 gcc patch with 6ALU+4AGU+double size FPU is just a diversion? [1]
consider these:
- asymmetry is hard even in CPUID level (MTL [3], 7900X3D [4], Phoenix [5] bugs)
- virtualization kills the new features, switch off [2]
- distinguish between #Zen5 and #Zen5c
1/2 https://t.co/tXlmngfbwC](https://pbs.twimg.com/media/GOF3QzVXIAEFKoJ.png)
![InstLatX64's tweet photo. ..and the znver5 gcc patch with 6ALU+4AGU+double size FPU is just a diversion? [1]
consider these:
- asymmetry is hard even in CPUID level (MTL [3], 7900X3D [4], Phoenix [5] bugs)
- virtualization kills the new features, switch off [2]
- distinguish between #Zen5 and #Zen5c
1/2 https://t.co/tXlmngfbwC](https://pbs.twimg.com/media/GOF3QD-WMAAPeXG.png)
![InstLatX64's tweet photo. ..and the znver5 gcc patch with 6ALU+4AGU+double size FPU is just a diversion? [1]
consider these:
- asymmetry is hard even in CPUID level (MTL [3], 7900X3D [4], Phoenix [5] bugs)
- virtualization kills the new features, switch off [2]
- distinguish between #Zen5 and #Zen5c
1/2 https://t.co/tXlmngfbwC](https://pbs.twimg.com/media/GOF3PRSXoAE4_tJ.png)
![InstLatX64's tweet photo. ..and the znver5 gcc patch with 6ALU+4AGU+double size FPU is just a diversion? [1]
consider these:
- asymmetry is hard even in CPUID level (MTL [3], 7900X3D [4], Phoenix [5] bugs)
- virtualization kills the new features, switch off [2]
- distinguish between #Zen5 and #Zen5c
1/2 https://t.co/tXlmngfbwC](https://pbs.twimg.com/media/GOF3Of5WEAAuuSM.png)
@harukaze5719 #Zen6 is just a rumor for now, but it seems plausible for me. It is absolutely not clear for me, that #Zen5D in #BreithornD and #Zen5c in STX are the same or different cores, so now I say that only Zen5D = 16core / CCD
New CPUID:
- #AMD #Zen5c #EPYC CPUID B10F00 [1]
#Intel Clarification:
- #ArrowLakeU is B065x (regular laptop) [2]
- #ArrowLakeH is C065x (premium mobile) [3]
Commit:
https://t.co/6zjLLpKHmu
[1]:https://t.co/z1nHDTveam
[2]:https://t.co/Yq4eK5GaYg
[3]:https://t.co/Ac6lUESGZr
New #AMD CPUID dumps:
- 24-Core #Threadripper 7960X (#StormPeak) A10F81
- 32-Core #ThreadripperPro 7975WX (StormPeak, SMT Off) A10F81
Commit:
https://t.co/ekLCiok6uk
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