#nmigen - Twitter Hashtag

Andrés Manelli @manelliandres

over 4 years ago

Smaller than expected, so cute. Looking forward to play with #LiteX and #nMigen 😁

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Anton Blanchard @antonblanchard

over 4 years ago

Always wanted to build your own BMC? We've been working on an Open Hardware LPC peripheral, written in #nMigen that will get you started. Get building!

Michael Neuling @mikeyneuling

over 4 years ago

https://t.co/BOVcvRpDb7 A new #nMigen based LPC Peripheral for the #libreBMC project that @antonblanchard and I have have been working on. Enjoy! @OpenPOWERorg

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Michael Neuling @mikeyneuling

over 4 years ago

https://t.co/BOVcvRpDb7 A new #nMigen based LPC Peripheral for the #libreBMC project that @antonblanchard and I have have been working on. Enjoy! @OpenPOWERorg

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LambdaConcept @LambdaConcept

almost 5 years ago

Mel Frequency Cepstral Coefficents #mfcc implemented in #nmigen running on the FPGA. https://t.co/Dl8RYKCOOM

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David Wheeler @DaveOfThings

about 5 years ago

nmigen blinky on #orangecrab. Woo hoo! I've been following Robert Baruch's YouTube series on developing a 6800 with #nmigen and this feels like a breakthrough.

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Josh 🌈 @NvrCast

over 5 years ago

#FPGA controlled RGB LEDs chasing themselves around my desk! Thank you so much @whitequark for the help with #nmigen! nmigen makes it so easy to compose the logic and test it!

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Vertigo @SamuelAFalvoII

over 5 years ago

Finally converted the #Kestrel3's KCP53000 RISC-V processor's ALU from Verilog into #nmigen. And wrote some corresponding proofs for it as well. This circuit is a beast. 17% of the iCE40LP8K resources. Yikes! A bit sluggish thanks to its obnoxiously large barrel shifters.

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Al @[email protected] @folknology

over 5 years ago

I will be streaming at 8pm BST this evening (less than a hour) - https://t.co/NvCN2OGNy6 #nMigen with #Alloy, part II plus news community etc..

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Hypercube Semiconductors @HelloHypercube

almost 6 years ago

@ChinaDaily The best thing China can do is invest in huge open source FPGA chips and completely eliminate US chip makers from global supply chain. #openFPGA #nmigen yosys nextpnr https://t.co/Mb4gLkIUmV - its all working and waiting for the next step change.

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Arran Short @ArranShort

almost 6 years ago

More blinky on the ColorLight 5A-75B! This time with just #nmigen doing all the work. #5a75b #5a_75b #ecp5 #lattice #prjtrellis #nextpnr #yosys #openFPGAloader #dirtyJtag

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Catherine @whitequark

almost 6 years ago

@NvrCast @TinyFPGA @OlofKindgren @xobs ##openfpga, #nmigen if that's your stuff

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Catherine @whitequark

about 6 years ago

@alt_kia oh neat / my condolences feel free to join the #nmigen IRC channel to discuss testing and FV strategies, there are a few subtleties i'm working on improving and i could always use feedback

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RndMnkIII @RndMnkIII

about 6 years ago

Next goal accomplished in #WSL2 : add support for USB devices using #USBIP and recompiling Linux kernel to add usb support with external modules (*.ko). In the end I could to use the iceprog tool to program the #Icebreaker (#iCE40UP5k) FPGA with a #nmigen blink example:

RndMnkIII's tweet photo. Next goal accomplished in #WSL2 : add support for USB devices using #USBIP and recompiling Linux kernel to add usb support with external modules (*.ko). In the end I could to use the iceprog tool to program the #Icebreaker (#iCE40UP5k) FPGA with a #nmigen blink example: https://t.co/KNAqt2qLZg

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LambdaConcept @LambdaConcept

about 6 years ago

Prototype of ECPIX-5 #ecp5 #nmigen

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Flux @WillFlux

about 6 years ago

I've started testing @Ubuntu 20.20 beta for #FPGA dev. Desktop performance is excellent thus far: Gnome is so much snappier than 18.04 and even better than 19.10. FPGA tools I'm testing on i7-1065G7 w/16GiB: #Verilator #Vivado #nMigen #Yosys Also testing: VSCode, RISC-V GCC

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Vertigo @SamuelAFalvoII

about 6 years ago

Just ported the Kestrel-2's S16X4A processor into the #nMigen language. Holy moley, this thing takes a while to formally verify, and it is quite a simple CPU compared to others in its class!

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Vertigo @SamuelAFalvoII

about 6 years ago

Rewriting the relevant bits of the #nMigen code to use the default clock domain made the Z80 bus interface work. Faith in my abilities has been restored. Whew!!

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Vertigo @SamuelAFalvoII

about 6 years ago

My very, very first attempt at using #nMigen to produce a bitstream, and it worked (to produce a bitstream) first try!! https://t.co/APu9U8OvaL I can't wait to test it when actually programmed onto the #fpga.

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Vertigo @SamuelAFalvoII

about 6 years ago

Spent all day yesterday writing an #nMigen module to generate horizontal sync pulses in what will hopefully become basically a clone of the Commodore 8568 VDC chip. It took a total of seven hours to implement and get it to pass formal verification. #fpga

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Catherine @whitequark

about 6 years ago

@pdp7 @LambdaConcept try the #nmigen channel at https://t.co/Q4V3fgkCba

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