With 4 years industry experience. Specializing in traditional compiler mid-end optimizations using MLIR, with hands-on LLVM framework experience. Seeking opportunities to pursue a suitable PhD position in program analysis or "classical" compiler .🙏
Take a look at our paper "𝘿𝙚𝙛𝙚𝙖𝙩 𝙩𝙝𝙚 𝙃𝙚𝙖𝙥: 𝙕𝙚𝙧𝙤-𝘾𝙤𝙥𝙮 𝘿𝙖𝙩𝙖 𝙈𝙤𝙫𝙚𝙢𝙚𝙣𝙩 𝙞𝙣 𝘼𝙓𝙄4𝙈𝙇𝙄𝙍" which was presented at the C4ML workshop at #CGO2026! 🙂
https://t.co/VZgdUsiLTA
A Case for Tracing Based DSL Kernel Languages
https://t.co/1i909GWE3t
On the architectural divide between parsing and tracing kernel DSLs, and what tends to go wrong in each.
by George Karpenkov
New articles in the GPU Glossary for CuTe DSL, CUTLASS, and CuTe -- the tools used to write some of the highest-performance kernels on contemporary data center GPUs.
https://t.co/hhdyvAO092
Digital Design & Comp. Arch: L24: Prefetching (Spring 2026) https://t.co/jz1zNYx9si via @YouTube
Join us in ~15 mins to discuss Advanced Caching and Prefetching.
We will discuss both fundamentals and recent research in this critical area.
@SAFARI_ETH_CMU
Best structured reference I've found for GPU optimization - 450 papers, 14 years of research. Some techniques will have evolved, but the mental models hold up.
https://t.co/2kFfsEq31h