Marco Ottavi

Professor and researcher on dependable computing systems @UTwente and @Unitorvergata

[Marco Ottavi @mottavi]

This memorandum of understanding between ESA and UT will boost our collaboration on designing and characterizing dependable computing systems for space applications.

The sky is the limit!

https://t.co/OsuSOYbevg

[Marco Ottavi @mottavi]

Do you want to make a difference in the emerging world of computing ushered by the open standard RISC-V? Check out these two exciting opportunities at our group!

https://t.co/s3iDudiBKm

https://t.co/Ruh91cphbI

#riscv #reliability #hardwaresecurity #phdposition #project

[Marco Ottavi @mottavi]

The TRISTAN (Together for RISc-V Technology and ApplicatioNs) project has started!
TRISTAN is a EU-funded initiative that aims to mature and expand the European RISC-V ecosystem for the next generation of industrial hardware to compete with existing commercial alternatives.

[Marco Ottavi @mottavi]

Is RISC-V ready for space? A security perspective.

In this paper, we discuss the security issues related to space applications mainly focusing on threats that come from the adoption of the RISC-V ISA.

https://t.co/Oec3Xm7h0c

#security #hardware #riscv

[Marco Ottavi @mottavi]

Can we use time division multithreading to dynamically provide fault tolerance? In this work we show a solution on a RISC-V architecture. https://t.co/RZvC6snPyr
#riscv #tmr #dependability

[Marco Ottavi @mottavi]

Can probabilistic data structures be used to achieve security and reliability at an architectural level? Congratulations to all the coauthors for the DFTS 2022 'Best Paper' Award with “Preventing Soft Errors and Hardware Troians in RISC-V Cores” #riscv #reliable #secure

[Marco Ottavi @mottavi]

We propose a RISC-V framework that supports logic-in-memory operations so that different logic-in-memory architectures can be inserted inside the microprocessor.
RISC-Vlim, a RISC-V Framework for Logic-in-Memory Architectures https://t.co/cKlRIO4lbs

[Marco Ottavi @mottavi]

New paper: An Efficient and Practical Software Obfuscation Framework" published at DSN-2022.
The paper proposes an end-to-end framework that can provide two-side authentication between the compiler and the executor. Framework (ERIC) open source a https://t.co/zwwwToj87e

[Marco Ottavi @mottavi]

Can Machine Learning (ML) detect Hardware Trojans introduced by a CAD tool into an FPGA bitstream? We present a comparative analysis of the ability of several ML models to detect the presence of HTHs in an FPGA bitstream.
https://t.co/6RXmIcCKvi
#ML #fpga #trojan #security #riscv

[Marco Ottavi @mottavi]

New paper “Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches” on TVLSI.
https://t.co/al7zV9g2U6
This work shows that sketches can implement lightweight and effective checkers for security in processor architectures.

#security #sketches #processor

[Uffstampa_RomaTorVergata @Notizieincampus]

IPA 2021, il brevetto di "Tor Vergata" per migliorare il calcolo dei dati tra i finalisti a Dubai. Da una collaborazione con il Politecnico di Torino https://t.co/0AAkH07Aye @ing_torvergata @PoliTOnews @ItalyinDubai @NetvalITA @MISE_GOV

[Marco Ottavi @mottavi]

The results of our experiments on neutron irradiation of perovskite films and solar cells on PET substrates are now available on Nano Energy. https://t.co/u83uXTFu3q

[Marco Ottavi @mottavi]

Racetrack Logic: a new paradigm for computing in memory

https://t.co/asKhLqo2fz

#computing #EmergingTech #patent

[Marco Ottavi @mottavi]

We have an exciting PhD opportunity at UTwente on dependable computing with RISC-V

https://t.co/3RiKj90qIP

[Marco Ottavi @mottavi]

Our patent "Memristor based sensor" has been approved by the USPTO. Among the many potential applications of memristive devices, sensing is one of the most interesting as it could lead to unprecedented sensor density and ubiquity in electronic systems. #sensing #memristor #patent

[Marco Ottavi @mottavi]

Congratulations to all the coauthors of "On-Board Satellite Telemetry Forecasting with RNN on RISC-V Based Multicore Processor" for winning the Best Paper Award at DFTS2020!
Danilo Cappellone, Stefano Di Mascio, @GLFurano, Alessandra Menicucci

Can AI be…https://t.co/S8X1r9H8qX

[Marco Ottavi @mottavi]

The IEEE DFT Symposium 2020 will be held online.

DFT is an annual Symposium providing an open forum for presentations in the field of defect and fault tolerance in VLSI and nanotechnology systems inclusive of emerging technologies…https://t.co/D2F4UwylDT https://t.co/IsT0v5KvCB

[Marco Ottavi @mottavi]

This invention represents a nanoelectronic device that is able to both memorize and elaborate data. Data are stored on a magnetic strip of nanometer sizes. At the same time it is possible to do simple logic operations on the stored…https://t.co/fwKGLkIIdA https://t.co/AeklQLZOJ7

[Michael P. Frank 💻🔜♻️ @MikePFrank]

My effort to promote targeted Federal investment in reversible computing R&D has had its first success--an Air Force STTR for an adiabatic/reversible test chip for space applications! 😄👍🏼https://t.co/vqiycz1rg0

[DFT Symposium @DFTSymposium]

News: #DFT2018 deadlines have been extended. New deadlines:
Abstract by May 4 2018.
Full paper by May 18, 2018.
Register your abstract ASAP.