tetramem

Founded in 2018, TetraMem is poised to deliver the industry’s most disruptive in-memory computing (IMC) technology for AI applications.

[tetramem @tetramem]

Huge thanks to @Synopsys and Sanjay Bali for the strong support and collaboration! 🚀

Our successful 12nm MLX300 AI SoC tapeout marks another major step toward commercializing RRAM-based Analog In-Memory Computing (A-IMC).

Let's accelerate the future of energy-efficient Edge AI together!

#RRAM #EdgeAI #AIHardware

[Synopsys @Synopsys]

Big milestone for @tetramem. 🎉 Following our conversation on analog in-memory computing and edge #AI, the team successfully taped out its new 12nm MLX300 AI SoC using Synopsys EDA solutions through Synopsys Cloud FlexEDA: https://t.co/WxUdaNAapx

[Synopsys @Synopsys]

Big milestone for @tetramem. 🎉 Following our conversation on analog in-memory computing and edge #AI, the team successfully taped out its new 12nm MLX300 AI SoC using Synopsys EDA solutions through Synopsys Cloud FlexEDA: https://t.co/WxUdaNAapx

[tetramem @tetramem]

TetraMem Advances Analog In-Memory Computing with Tapeout of New 12nm AI SoC - https://t.co/nurh89DYd8

[tetramem @tetramem]

The next breakthrough may not be about stacking more memory on top of logic, but rethinking where computing happens.

RRAM-based Analog In-Memory Computing (A-IMC) offers a fundamentally different approach: compute directly where AI weights are stored, dramatically reducing data movement, memory bandwidth demands, power consumption, and thermal challenges.

Rather than endlessly scaling HBM bandwidth and managing the heat of increasingly complex 3D stacks, we can rethink the memory-compute architecture itself.

HBM makes the data highway wider. SRAM makes the journey shorter. RRAM A-IMC asks: Why move the weights at all?

That's what we're building at TetraMem.

Compute Where the Weights Live!

[Elon Musk @elonmusk]

When China figures out how to manufacture a product, their ability to scale is often greater than the rest of the world combined. We saw this with lithium batteries and solar, for example.

SpaceX is a rare counter-example, where its mass to orbit is roughly an order of magnitude greater than the rest of the world, BUT China now does a majority of non-SpaceX mass to orbit. SpaceX is an anomaly in the matrix.

Maybe RAM will be different, but RAM was a low margin commodity only ~3 years ago. LP5 and LP6 are designed to a common standard that China seems to be solving fast.

Newer HBM architectures and things like an SRAM layer below logic and 3D stacking RAM on top of logic while finding a way to keep the logic cooled will be harder to solve.

[nature @Nature]

Nature research paper: Thousands of conductance levels in memristors integrated on CMOS https://t.co/grdWTTWYvg

[tetramem @tetramem]

https://t.co/1emr63foip