Digital Electronic Systems at Sapienza University

Profilo didattico e informativo per studenti ed ex-studenti di Ingegneria Elettronica.
Educational/news channel for Electronics Engineering students and alumni.

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

ANNOUNCEMENT 😀😀😀: new discussion group "Digital @ Sapienza" is now available on the Linkedin social platform. Request to join at https://t.co/PaAtvJ6QGH

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

Announcement: new discussion group "Digital @ Sapienza" is now available on the Linkedin social platform. Request to join at https://t.co/PaAtvJ6QGH

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

A great result from the Digital System Lab at Sapienza. 😀Congratulations to PhD student Marco Angioli and team.

[Mauro Olivieri @Mauro_Olivieri_]

Is it possible to find out truly new results on binary integer divisions in 2024? Yes it is.😀
See Marco Angioli at al.,"Design, Implementation and Evaluation of a New Variable Latency Integer Division Scheme" in IEEE Transactions on Computers.
https://t.co/XSfoOphsfW

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

Open DIET will take place on April 9, with the participation of world-class companies in the electronics sector.
The event is especially dedicated to undergrad students, yet it can be interesting to master level students as well.
Event programme at https://t.co/jtxZRF4dH7

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

Martedì 9 aprile 2024, ore 10.00, Chiostro della Facoltà di Ingegneria in S. Pietro in Vincoli, Open DIET 2024.
https://t.co/En8oPp4EGY
https://t.co/SmuK4RLzk3
https://t.co/bhlJTo67xQ...
https://t.co/gEXs0U6DO4

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

For ex DISA students: The company https://t.co/wzNOK65OTl is selecting HWdesigners with experience in FPGA and preferably RISC-V. The job position is open on the whole Italian territory and the work can be partially carried out remotely.
Send CV to [email protected]

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

https://t.co/Ufw0gVuvNJ

[Mauro Olivieri @Mauro_Olivieri_]

Very interesting article (in Italian)
https://t.co/SshuKejB4s

[Mauro Olivieri @Mauro_Olivieri_]

Happy to share the HPCwire article featuring @eprocessor_eu: The European Project Creating Extensible Energy-Efficient #RISCV CPUs https://t.co/rMgUFAiMqb
@SapienzaRoma contributes to the project through the Digital System Lab led by Mauro Olivieri (that's me!) at the DIET Dpt.

[Mauro Olivieri @Mauro_Olivieri_]

Want to do world-class #research in #digital #electronics #design and #RISCV #microprocessors at 300 mt. from the Colosseum?
#PhD in #ICT positions open at #Sapienza #University of Rome, deadline for application 22 June 2023.
Info: Prof. Mauro Olivieri [email protected]

[Mauro Olivieri @Mauro_Olivieri_]

A blog post on the RISC-V compliant small precision vector floating point support, being developed in the @eprocessor_eu projectby the Digital System Lab at Sapienza Univ.
https://t.co/YobPVWp1jo

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

[ENGLISH] Sapienza Master Students - Next week the following courses start:
- DISA for the first year of the LMEE
- DISA II for the second year of the LMEE
not to be confused. Both are taugh by prof. M. Olivieri. Detailed info at https://t.co/K8XHuT4kSf

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

[ITALIAN] Studenti Magistrali Sapienza - La prossima settimana iniziano i corsi di
- DISA al primo anno della LMEE
- DISA II al secondo anno della LMEE,
da non confondersi fra loro, entrambi tenuti dal prof. M. Olivieri. Info dettagliate su: https://t.co/K8XHuT4kSf

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

[ITALIANO] Per studenti Sapienza: opportunità di tesi magistrale sulle architetture di supercalcolo presso il BSC di Barcellona, Spagna, con inizio in primavera 2023. Inviare la propria manifestazione di interesse ENTRO OGGI a [email protected]

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

[ENGLISH] For Sapienza Univesity students: Master thesis opportunity on supercomputing architectures at the BSC in Barcelona, Spain, starting in spring 2023. Send your expression of interest WITHIN TODAY to [email protected]

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

[ITALIAN] Studenti di Elettronica Digitale primo livello - Un tristate buffer disabilitato ha semplicemente l'uscita in "alta impedenza", ossia un valore logico fluttuante non determinato a priori. Serve a gestire correttamente segnali in conflitto. Nessun altro uso ha senso.

[Mauro Olivieri @Mauro_Olivieri_]

Video of a presentation I recently gave at Sapienza University (in Italian):
"La Corsa Europea verso il Calcolo Exascale - Mauro Olivieri" https://t.co/nPLseCNPho via @YouTube

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

Good hints for advanced students.
(Shi zji's notes also include some contents from Mauro Olivieri's lecture at the same European Summer School.)

[PULP Platform @pulp_platform]

Taking notes is becoming a lost art. We love people who share their notes 🥰 Here are the notes of Shi Ziji's taken during Luca's lecture at ACM Summer School on HPC in Barcelona😀. https://t.co/X4KUfs7uRi

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

Ex Students of DISA :
Thales is hiring HW digital designers in Rome, Italy
https://t.co/V3JfOysw8t

[Digital Electronic Systems at Sapienza University @DigitalSapienza]

Important training&job opportunity at Capgemini on digital ASIC design, for students who did their Master degree thesis in the digital system design Lab at Sapienza University.
Send resume to [email protected]
https://t.co/g2csT2raZJ