JerryTech

电子工程师，芯片设计工程师，BDSM轻度玩家，🌈男孩
Electronic Engineer，IC designer，love bdsm and naked expose.LGBTQ+/gay.

[ₕₐₘₚₜₒₙ @hamptonism]

Assembling a Quantum Computer:

[0xor0ne @0xor0ne]

Tearing down the TP-Link Tapo C260 camera, firmware reverse engineering by @spaceraccoonsec

https://t.co/luOJ0Ng6Rj

#infosec

[JerryTech @JerryTech6]

@dutyge 没有拼命刷题的数学基础，工业能吃下来?我们领导50多岁了还在看线性代数离散数学，我们天天看代码改图纸自觉加班。我接触过美国的年轻人里，苦功夫的基本功好的真的没几个。国内那么多人业余玩的都比他们不少科技公司卷的狠，就算爱好者也会去死卷，和欧美那种just for fun��完全不一样的

[JerryTech @JerryTech6]

@dutyge 真正需要的是卷起来，人的生命就三万天，少休���，多学习，多去搞工作。我自己也是每天九点下班必须要求自己必须健身和看代码学习。人不能懒，懒了活该被淘汰。沙滩边天天晒太阳去派对的和天天算图纸编程的对比，谁工业强，一目了然

[JerryTech @JerryTech6]

@dutyge 美国年轻人设计的电路板，做底层的核心软件开发，你可以看看现在欧美年轻人，吃苦加班的不乐意，画图是全凭兴趣和心情，没有那种竞争的思想和主动吃苦的觉悟，所以在科技上我们现在追上来了。硅谷做硬件那批也是华人，欧美人坐那里发令数钱当姥爷啥都做不出来。

[Andrew Elbert Wilson @FPGA_Zealot]

IODDRs on AMD UltraScale+ FPGAs map to IOSERDES during tech mapping, which can make tri-state tricky.
To drive T with proper IOB FF timing, add a second ODDR—this maps directly to special IOSERDES logic.
How often do you use IODDR, IOSERDES, or RXTX_BITSLICE in your designs?

[Rue Mohr🇨🇦 @RueNahcMohr]

Z180????
Does anyone know?

[braeden hall @braedenhall_]

redesigned my flight computer circuit. this time based on the stm32f405

also adds wireless comms through on board ble or external lora mod

[GiamMa-based researchers SDR R&D IoT @giammaiot2]

rpi-sdr-tx by KaliAssistant

https://t.co/HOM2lQH05x

Raspberry Pi Software-Defined Radio Transmitter Toolkit

#SoftwareDefinedRadio #SDR
#Raspberry #RpiTx

[Logic Destroyer — Proven in Silicon. @splinedrive]

Let's write C++23 code in an academic style.
I aim to implement a modern C++ threading example using 100 threads—both with and without mutex protection—on my self-designed, from-scratch RISC-V Linux SoC, KianV

[HanxiaoMeow @HanxiaoM]

#M5StackLLM 2242 Size M.2 PCIE AX8850 LLM Acclerator Card designed for Raspberry Pi

[M17 Project @m17_project]

Rate my wallpaper ;-)

Preparing a Retevis C62 for M17 development (and more!) Stay tuned.
^SP5WWP

@OE3ANC

[A. I. (Macro Photography)🔬 @MacroWorld21]

Gold fashion 😛

[Logic Destroyer — Proven in Silicon. @splinedrive]

Wrote a brutal C++23 CPU monitor for my KianV RISC-V Linux SoC on FPGA. It uses 8 GPIO LEDs to show live CPU load. Clean modern C++, signal-safe shutdown, no mercy , just pure hardware feedback.

[JerryTech @JerryTech6]

@NTHLzero4 @sucks_funfun 可以啊，哈哈

[hackaday @hackaday]

A 100-Year-Old Electronic Musical Instrument Brought Back to Life
https://t.co/uquTY3pqRC

[Logic Destroyer — Proven in Silicon. @splinedrive]

Hello world! I’m the only iCE40HX8K on the planet running Linux 6.15-rc6. Out of billions of humans, one madman is making me run Linux — with networking!

[Mehdi @MehdiHacks]

This is how it looks inside