logic destroyer

Life’s too short for someone else’s silicon.

[logic destroyer @splinedrive]

ASIC Design Silicon Proven
@machdyne topaz

[logic destroyer @splinedrive]

I ♥️ski aggu

[Matthew Venn @matthewvenn]

Photolithography is the #ASIC terminology of the week!
https://t.co/smAFWY6I2H

In the last month, Photolithography has been the 24th most popular out of 42 terms.

[logic destroyer @splinedrive]

@PsychogenicTech crazy!

[psychogenic @PsychogenicTech]

New form-factor for GF180 TT ASICs panelized for wirebonding. Can be used as a raw IC or have designs loaded and/or clocked by the CH32 MCU, while giving external circuitry access to all I/O along with a USB TUI, using https://t.co/f4Azs8OHZf (built on the amazing ch32fun lib).

[Ayaan 🐧 @twtayaan]

Linus Torvalds uses Claude for Linux, but doesn’t want your AI code if you don’t understand it.

He wants “competent people to use AI as a tool” and criticizes drive by patches from people who don’t understand their submissions.

Newcomers are welcome, as long as they’re willing to learn and understand the code they submit.

Linus also identifies another problem. AI is finding real bugs, adding work for already overloaded maintainers.

His position is clear. Use AI, but understand the code you submit.

Full story: https://t.co/BuQlNL4SAf

[Chris @criccomini]

Rust has kind of become unusable for me with AI and worktrees… Between the compile times and the disk usage, it’s a huge tax. I’m working in a C++ codebase right now and it’s such a breath of fresh air… I never thought I would say that

[Marcelo Samsoniuk @samsoniuk]

wow! this is crazy! 🔥🔥🔥

[logic destroyer @splinedrive]

https://t.co/EiW1alUiFr

[logic destroyer @splinedrive]

https://t.co/EiW1alUiFr

[logic destroyer @splinedrive]

I motivated my 9-year-old son to develop an 8-bit binary counter as an ASIC using Wokwi, following certain instructions. Here is the result.

@WokwiMakes @tinytapeout @UriShaked @matthewvenn
#wokwi #asic #dff #binary #counter #revolution
#logicDestroyer generation change, game changer
The future belongs to our KID chip designers.

[logic destroyer @splinedrive]

Father and son. No FPGA, no ASIC. Just jumps and downhill.

[logic destroyer @splinedrive]

My son Kian was only nine years old when he made his first @tinytapeout asic design.

[logic destroyer @splinedrive]

My son Kian was only nine years old when he made his first @tinytapeout asic design.

[Matthew Venn @matthewvenn]

Introducing the Zero to ASIC analog course!

https://t.co/WyKPnS1PpZ

Don't miss the Black Friday discounts - join the newsletter for $150 off on Friday: https://t.co/4CnRpaezYZ

Full course details: https://t.co/rT8PD5kZtj

[Matthew Venn @matthewvenn]

I designed an analog mixed-signal radio chip with an AI agent: about 700 prompts in a week, and it's now submitted for tapeout.

Here's how it went at each step of the design, the times it was confidently wrong, and how I caught them.

https://t.co/3S0ZcQ3kHs

#ASIC #opensource

[Machdyne UG @machdyne]

Zeitlos #FPGA SOC/OS now has up to 256 colors in game mode. 🌈

[Marcelo Samsoniuk @samsoniuk]

wow! welcome to the SLOP-V! 🤣

[logic destroyer @splinedrive]

Vacation begins!

[logic destroyer @splinedrive]

StealthV – Custom RISC-V Quad-Core Linux SoC | Marketing Video

[logic destroyer @splinedrive]

StealthV – Custom RISC-V Quad-Core Linux SoC | Marketing Video

[Marcelo Samsoniuk @samsoniuk]

well, I always talk about this but as a joke! 🤣