斜杠青年施洛斯

[斜杠青年施洛斯 @Joyyobe]

Starting today, I’ll be sharing updates on my A-share paper trading portfolio every two weeks to see how my investment strategy performs over the long run.

Starting capital: RMB 1 million. As of October 15, the portfolio stands at RMB 1.006 million (+0.60%), with nearly 100% invested in Chalco (601600) and Lu’an Environmental Energy (601699).

I’ll regularly share my holdings, performance, and the reasoning behind any portfolio adjustments, including both gains and drawdowns.

The goal isn’t to chase short-term returns or mistake luck for skill. It’s to build a transparent track record, test my investment framework, and learn from what works and what doesn’t.

Time will tell.

[斜杠青年施洛斯 @Joyyobe]

@CaptainLufei999 @CaptainLufei999

[斜杠青年施洛斯 @Joyyobe]

@CaptainLufei999 最早是因为“卖房的Jason”关注到你的，当时只是觉得你的经历和想法挺有意思。后来慢慢看了更多分享，发现你对投资、商业、社会乃至人生的很多问题，都有自己独立而深刻的思考，是个很有营养的博主。

[斜杠青年施洛斯 @Joyyobe]

@2030FY_X 广汇能源、恒源煤电、潞安环能现在都还很不错

[斜杠青年施洛斯 @Joyyobe]

@yuyy614893671 pdd这家公司我跟了好几年了，他目前是三成美股大盘7成美债的投资策略，后续有可能会继续升高。其实本质上就是在开保险公司，用主营业务的稳定现金流来进行钱生钱的游戏。但是这种不分红不会购的公司，未来大概率也是净资产推着市值走，现阶段不能用pe估值的。

[斜杠青年施洛斯 @Joyyobe]

每日卖方研究简报｜2026年10月17日
Daily Sell-Side Research Brief | October 17, 2026 https://t.co/WRtZf2cxR3

[斜杠青年施洛斯 @Joyyobe]

@Alex_perception 工作、生活、搞钱方式，在这个时代里面

[斜杠青年施洛斯 @Joyyobe]

As processors add more parallel execution units, memory must feed them concurrently. Conventional interfaces face limits in pin count, physical reach, and energy per transferred bit. Increasing signaling rates on relatively narrow interfaces creates further signal-integrity, circuit-design, and power challenges. An alternative is to create many parallel connections over shorter distances. High Bandwidth Memory, or HBM, follows this approach.
HBM stacks multiple DRAM dies using vertical connections such as through-silicon vias and integrates them with logic processors through advanced packaging. It is not merely conventional memory running at a higher clock speed; high aggregate bandwidth comes from a much wider interface and a different integration approach. This can ease the memory wall for AI workloads that frequently load weights or intermediate data, although the benefit depends on arithmetic intensity and data reuse.
HBM improves both capacity density within a package and bandwidth to the processor, but introduces more fabrication, vertical-interconnect, testing, and thermal-management steps. In a simplified example, if sixteen DRAM layers each have independent 99.5% yield and every layer must work with no repairs, combined yield is 0.995^16 ≈ 92.3%. This is not a commercial HBM yield estimate; it only illustrates how stacking can compound quality risk.
Commercial production uses Known Good Die screening, redundancy, repair, and tight process control, while failures across layers need not be independent. Multiplying a single-die yield must not be confused with disclosed commercial results. Relevant investment metrics are cost per good bit, stacking and packaging yield, testing time, equipment spending, and scale—not merely the advertised number of layers.
A very wide memory interface requires numerous short connections between HBM and logic dies inside the package. GPU design must therefore consider package footprint, number of HBM stacks, interconnect routing, power, and cooling from the outset. A powerful processor with insufficient HBM bandwidth cannot realize its potential. Conversely, adding more stacks may worsen cost, thermals, and yield, reducing system economics.
HBM should therefore be valued not only by price per gigabyte, but by its contribution to useful throughput, latency, and overall cost. Bandwidth may be the primary bottleneck for some workloads, whereas computation or rack-to-rack networking dominates others. Optimal memory configuration is a function of workload and economics, not an automatic preference for the maximum stack count or capacity.
As stack heights and interface speeds rise, heat must pass through increasingly complex silicon, bonding materials, and package pathways. The adjacent logic processor produces high heat flux, while the HBM stack may contain local hotspots. Excess thermal resistance can require lower operating speed, more expensive cooling, or create long-term reliability risks.
Evaluation should combine sustained bandwidth, energy per bit, temperature distribution, cost, and reliable delivery. Upgrading HBM is no longer just a DRAM process race; it is a coordinated race across memory fabrication, packaging, materials, testing, and thermal design. Whether HBM earns durable excess profits depends on scarcity across these capabilities, not on capacity demand alone.

[斜杠青年施洛斯 @Joyyobe]

Understanding future demand for computing and storage requires distinguishing among three concepts: data generation, persistent storage, and the active working set.
Data generation encompasses data that is created, copied, transmitted, and used. A video may exist as a single original file, yet repeated viewing, caching, and distribution can generate a volume of data activity far greater than the size of that file.
Persistent storage refers to data that needs to be retained over the long term, including datasets, documents, model files, logs, backups, and business records.
The active working set is the collection of data a system must access quickly while performing a task. Model weights, activations, and the KV cache used during AI inference, for example, directly affect runtime memory requirements.
Although these three metrics are related, they do not necessarily grow at the same rate.
Rapid growth in global network traffic does not require a proportional increase in data center DRAM capacity, because much of that data is simply being transmitted rather than remaining in DRAM. Likewise, growth in persistent storage does not mean that all stored data needs to reside in high-bandwidth memory.
Conversely, if AI workloads require longer context windows, greater concurrency, and larger sets of data for real-time processing, the active working set may grow faster than overall data volumes.
Assessing AI hardware demand therefore requires tracing a more detailed chain of relationships:
Growth in data activity changes the demand for computation and data retention; the nature of those tasks determines the compute, memory, and communication resources required; and system efficiency and utilization together determine how much hardware ultimately needs to be purchased.

[斜杠青年施洛斯 @Joyyobe]

@andyz8818576155 其实对于这种大盘来说，某种程度上某一年的低配反而未来一两年整体来说有一个价值重估机会的可能性，但是如果说一两年超配了，对于这种大盘指数来说，可能未来两年的风险就会比较高，能用美元潮汐收割全球的美股除外。

[斜杠青年施洛斯 @Joyyobe]

这幅图的本质就是说明好的投资是在用pb估值的时候买入，用peg估值的时候卖出。

[斜杠青年施洛斯 @Joyyobe]

China Coal Market Update | October 16
China’s National Development and Reform Commission (NDRC) and National Energy Administration (NEA), together with other relevant government departments, held a meeting in Taiyuan, Shanxi, on October 16 to accelerate coal mine restarts, increase production, and ensure adequate supply.

The authorities called on Shanxi to expedite the reopening of suspended mines and increase coal supply while ensuring safety, helping maintain stable market conditions. They instructed the province to develop mine-specific restart plans, streamline inspection and approval procedures, and accelerate the resumption of operations at temporarily suspended mines. Mines resuming operations should improve production planning and organization to reach full capacity as quickly as possible and restore output to normal levels.

Thermal Coal Market Prices | October 16

Northern ports — thermal coal for non-power-plant buyers: 5,500 kcal/kg at RMB 1,035/t (unchanged); 5,000 kcal/kg at RMB 935/t (unchanged); 4,500 kcal/kg at RMB 835/t (unchanged).
Yangtze River ports — thermal coal for non-power-plant buyers: 5,500 kcal/kg at RMB 1,080/t (unchanged); 5,000 kcal/kg at RMB 975/t (unchanged); 4,500 kcal/kg at RMB 880/t (unchanged).

[斜杠青年施洛斯 @Joyyobe]

For more than half a century, the development of modern computing has rested on a relatively stable technological and economic relationship: as transistors shrink, more of them can fit into a given area of silicon, increasing computing power while reducing the cost per unit of computation.
This relationship has driven the evolution of mainframes, personal computers, the internet, smartphones, and the broader digital economy. Beyond an advance in semiconductor manufacturing, it has provided the economic foundation for sustained growth across the information technology industry.
Today, that growth mechanism is changing.
AI’s demand for computing resources continues to rise rapidly, but the performance gains and cost reductions delivered by conventional transistor scaling can no longer keep pace as consistently as they once did. Advanced manufacturing processes are becoming increasingly expensive, chip power density continues to rise, and the time and energy required to move data between processors and memory—and between computing chips—are becoming major constraints on AI system performance.
At the same time, the architecture of AI computing is evolving. In the past, a computer’s performance depended largely on the processing speed of its CPU. Today, an AI system’s effective computing capacity depends not only on its GPUs or ASICs, but also on whether they have sufficient memory capacity, memory bandwidth, interconnect capability, power, and cooling.
The competitive focus of the AI computing industry is shifting from the number of transistors on an individual chip to the overall efficiency of the computing system.
This shift can be understood through three interconnected capabilities: computation, memory and storage, and data movement. Compute capability determines how much processing can be performed; memory and storage determine how much data can be retained and accessed; and data movement determines how efficiently information flows between computing and storage units.
The technical challenges extend further. As computation, memory, and interconnects become integrated into increasingly complex systems, advanced packaging, chiplet design, testing, materials, manufacturing equipment, power delivery, cooling, and supply chain coordination will all become more important.
Understanding the semiconductor industry over the next decade therefore requires looking beyond which company has the most advanced transistor manufacturing process. Nor can revenue growth for a particular component category be inferred simply from rising AI capital expenditure. The essential questions are what currently constrains computing systems, how technological innovation changes those constraints, which companies offer solutions that are difficult to replace, and how those technological advantages ultimately translate into sustainable cash flows and returns on capital.

[斜杠青年施洛斯 @Joyyobe]

To understand how the AI semiconductor industry will evolve over the next decade, we must look beyond the growth of GPU computing power and examine three interdependent capabilities that are advancing at different speeds: Compute, Memory, and Interconnect.

Compute determines the theoretical ceiling of processing performance. Memory determines whether data can be stored, accessed, and delivered when needed. Interconnect determines how efficiently computing units exchange information and coordinate their operations. These capabilities are deeply interconnected, and a bottleneck in any one of them can prevent investment in the others from translating into actual performance gains.

For decades, semiconductor progress was driven primarily by transistor scaling, which increased computing performance while reducing the cost per computation. However, as the economic benefits of traditional Moore's Law diminish, a fundamental imbalance is becoming increasingly apparent: In many workloads, computing capabilities are advancing significantly faster than memory bandwidth and interconnect bandwidth.

Consequently, even if a GPU's theoretical FLOPS continue to increase dramatically, real-world computational efficiency may not improve at the same pace. Processing units can remain idle while waiting for memory access, while communication and synchronization overhead across chips and racks can prevent systems from achieving their theoretical performance.

The central challenge in AI hardware is therefore evolving beyond simply building more powerful processors. It is increasingly about enabling vast numbers of computing units to access data and coordinate efficiently, with sufficiently low cost, energy consumption, and latency.

This shift is fundamentally reshaping semiconductor technology roadmaps. HBM, on-chip caches, chiplets, 2.5D/3D advanced packaging, hybrid bonding, high-speed interconnects, and optical communication are becoming increasingly important. Their shared objective is to reduce data movement distances, increase effective bandwidth, lower energy consumption per transferred bit, and overcome the limitations of traditional monolithic chip architectures.

Yet an even more important insight is that technological innovation does not merely expand the supply of scarce resources; it can also bypass existing bottlenecks altogether. Model compression, data reuse, hierarchical memory, memory expansion, and communication optimization can all reduce the hardware resources required per computational task. Therefore, today's bottleneck may not be tomorrow's bottleneck, and today's scarcest technology may not retain its pricing power indefinitely.

From an investment perspective, this suggests that the distribution of value across the AI industry may undergo a structural transformation. The companies capturing the greatest economic rents may not necessarily be those offering the highest peak compute performance, but those capable of continuously overcoming the memory wall, communication wall, and energy wall while translating technological advantages into tangible customer value.

In the post-Moore era, the most meaningful competitive metrics are expanding beyond transistor counts and peak FLOPS of individual chips toward system-level effective throughput, computational output per dollar (Tokens/$), and computational output per joule (Tokens/J).

Ultimately, the AI race will not be won simply by whoever possesses the greatest theoretical computing power, but by whoever can integrate compute, memory, and interconnect into the most efficient computing system at the lowest total cost.

Over the next decade, understanding the relative pace of progress across these three capabilities, the migration of bottlenecks, and the emergence of alternative technological architectures may prove more valuable for identifying long-term semiconductor investment opportunities than merely forecasting GPU shipments.

[斜杠青年施洛斯 @Joyyobe]

Aluminum Morning Brief | October 16, 2026
Key Market Drivers

1. Continued inventory drawdowns support China's aluminum fundamentals.

As of October 15, primary aluminum inventories across major Chinese markets stood at 586,000 tonnes, down 30,000 tonnes from the previous reading. Aluminum billet inventories also declined by 12,000 tonnes to 176,500 tonnes. Continued destocking after the holiday reinforces signs of resilient downstream demand.

2. Overseas supply expectations weigh on LME aluminum prices.

LME three-month aluminum fell to US$2,986.50/tonne. Accelerating smelter restarts in the Middle East, combined with expectations of new capacity coming online in Indonesia, are putting downward pressure on international aluminum prices.

3. Improving macro sentiment provides support, but overseas headwinds limit upside.

A weaker US Dollar Index is generally supportive of base metals. However, stalled LME inventory drawdowns and expectations of looser overseas supply conditions are limiting the upside potential for SHFE aluminum.

Market Outlook

Range-bound trading, with domestic inventory drawdowns providing downside support while overseas supply pressures cap potential gains.

[斜杠青年施洛斯 @Joyyobe]

China accounts for nearly 60% of global primary aluminum production but holds only 3.3% of the world's bauxite reserves. Its reliance on imported bauxite has remained above 73%, with roughly 80% of imports coming from Guinea.

In 2026, Guinea raised its bauxite export tariff from 5.5% to 10% and introduced a requirement for companies exporting at least 15 million tonnes annually to build alumina refineries within seven years, effectively forcing more value-added processing to take place domestically.

[斜杠青年施洛斯 @Joyyobe]

@Alex_perception 和日本当年泡沫破裂后其实是一样的，每次为期1年的小牛市都伴随着更积极的财政和货币政策。