@maxslug @fpga_languages #FPGA code, #HDL or #HLS, should be referred to as "#gateware". It would make nomenclature and conventions more precise, and disambiguate the much confused and abused term "#firmware".
The programmable logic industry doesn’t have a standard benchmarking methodology. So, we chose publicly available designs from OpenCores across applications like video and encryption using a stamping methodology to test performance. The results are in 👇
https://t.co/DPFVhWfSaj
We are very happy that we'll meet up again for #osda2023 at @DATEconference. The Call for Papers is open now! Please submit your contributions at https://t.co/Sr7wUNG25t!
@oe1cxw@hipolitoguzman I will be again representing @Oliscience101 and @opencores_org mostly covering the "[...] Open-source IP for FPGA -- contributions that enrich the IP ecosystem and reduce the need to “re-invent the wheel” [...]" + some mini-more!
RISC-V: Why The ISA Battles Aren’t Over Yet via @hackaday https://t.co/A55fYNF5Ax mentioning #OpenRISC, the "good old" one, which sparked our #OpenCores community.
They talk about us! Kudos should be given also to @Oliscience101 who in 2017 took over the stewardship of the #OpenCores community, and platform: to take its legacy forward and to new heights! #FPGA#OpenSource#gateware
Interested in💰 €45000 funding to find the right partner to try out your HPC technology? The open call for Technology Transfer Project unites an academic partner as technology provider and an industry partner as technology receiver. More info? 👉https://t.co/EZRr3lZiht
Comments and feedback on what could be improved on #OpenCores.org are deeply appreciated also here! Alternativecely feel free to PM or [email protected] to get in touch with us! #FPGA#gateware#opensource [engaged to give our best]
ASICs, FPGAs and GPUs are everywhere in @CERN@ALICEexperiment From 4TB/s raw data to 100GB/s with @intel FPGAs and GPUs, ALICE is producing 66 TB per year
@opencores_org account got suspended this morning because we're trying to claim it back. We hope that @Twitter support will help us in doing so! We keep you posted. --> Best /:/ OC-team.
@SamuelAFalvoII@zipcpu What do you mean by "disabled" and "deleted"? https://t.co/97ga2x9e0w it is there, where it had been for the past 16 years.:) Yes, there is a desire to start working on a B.5 revision indeed.
#OSDA is tomorrow! *"How does one commercialise/undertake research on open-source EDE/IP?"* --> What would you like to see discussed during the panel? Shoot questions here if you can't make it, we'll try to cover them! #DATEconference#FPGA#OpenCores.org