๐๐๐๐๐๐๐๐: $MRVL ๐๐๐ซ๐ฏ๐๐ฅ๐ฅ ๐ญ๐จ ๐๐๐ฌ๐ข๐ ๐ง $GOOGL ๐๐จ๐จ๐ ๐ฅ๐ ๐๐๐ญ๐ฐ๐จ๐ซ๐ค๐ข๐ง๐ ๐๐ก๐ข๐ฉ ๐จ๐ง $INTC ๐๐ง๐ญ๐๐ฅ 18๐ ๐ข๐ง ๐ ๐๐๐ฃ๐จ๐ซ ๐๐ข๐ง ๐๐จ๐ซ ๐๐ง๐ญ๐๐ฅ ๐ ๐จ๐ฎ๐ง๐๐ซ๐ฒ, ๐ฉ๐๐ซ ๐ ๐ฎ๐ง๐๐ ๐๐
Funda AI reports that Marvell will design a custom networking chip for Google. It will be fabricated on Intelโs advanced 18A (or 18AP) process node, with mass production ramping by end of 2027. This chip will pair with MediaTekโs Humufish (Googleโs next-gen TPU v8e design).
This is a clear signal of Googleโs multi-vendor strategy in full swing. Diversifying design partners, while tapping Intel Foundry for cutting-edge manufacturing.
This builds on reports from April of Google in talks with Marvell for AI inference chips, including a memory processing unit to complement TPUs and a new inference-optimized TPU.
Thank you @Intel_Foundry, but I'll take it from here.
EMIB-T: The Only Advanced Packaging That Matters
For my audience, they are pretty aware of the fact that I have an EMIB-T post up, talking about TSVs, MIM capacitors, and how reticle-scale comes into play. I'll drop the link in the comments :)
But this isn't the interesting part; rather, specifically, Intel is talking about technologies that are the emerging avenues:
- Enabling over 12 Gb/s HBM4e with EMIB-T
- Package architectures for hyper-large form-factors for AI and HPC
Co-Packaged Optics for Improved Bandwidth
-High-performance detachable edge optical
- V-groove-based edge coupling glass coupler interface
Hybrid Bonding
- Die distortion in die-to-wafer hybrid bonding
- Ultra-low temperature hybrid bonding for die-to-wafer scaling
$INTC
#Intelโs 18A node math is wild.
โข Foundry wafer cost: ~$22k
โข Yields: ~60% (Past the danger zone)
โข Finished chip revenue: $65kโ$90k+ per wafer
Thatโs a $40kโ$70k gross profit spread per wafer being used to fund Intel's massive long-term turnaround strategy. $INTC
With the introduction of the TPUv8t, their new training focused TPU, Google unveiled a new scale-out network architecture called Virgo. Virgo is able to interconnect up to 134,400 chips with up to 47 Pbps of non-blocking bi-sectional bandwidth. (1/4)๐งต
Finally, @SemiAnalysis_ talks about this:
"Intel Foundry's EMIB plus 18A-P/T is positioned as a multi-billion-dollar external franchise into 2028. New entrants still pushing into foundry. Rapidus (2nm/1.4nm), Tata (mature), Huawei (Tau Scaling), and Tesla-SpaceX Terafab targeting 1M wafers/month across logic, memory, and packaging.ย The foundry industry is now three markets."
$INTC Q126 growth tells a lot about the foundry momentum, and if you have been following my work, I am sure this data is nothing new :)
๐ New blog: Heterogeneous CPU + GPU EPD Disaggregation to Boost VLM Serving, with Intel Xeon CPUs offloading vision encoding to cut TTFT and boost throughput.
Vision encoding is the bottleneck in image-heavy VLM serving. Offloading it to CPUs changes that. By using SGLang EPD disaggregation + Dynamo device-aware weighted router + @Intel AMX on Xeon 6747P, we achieved:
โ 1.2-1.3ร lower P99 TTFT & higher request throughput โ 1.3-30ร lower P99 TPOT
โ Extra ROI on top of pure GPU EPD disaggregation, at near-zero added cost
Thanks to @inteldevs for the collaboration on this!
Jensen put a 1 petaflop AI machine on your desk
RTX Spark
Blackwell GPU + 20 core Grace CPU built with MediaTek
128GB unified memory at 600 GB/s
In January I said Apple owned the edge
NVIDIA just answered at the desk
The Edge Token Factory
$NVDA
https://t.co/KoATlVzmgK
$INTC Crescent Island Is Here, And It's The First 18A-P Product to Offer Up to a Whopping 480GB LPDDR5X Memory For High-Speed Inference
Intel's first mainstream datacenter GPU launch, the Crescent Island, is here, and we last saw this SKU at Intel Tech Tour. The fascinating part about this launch is Intel's decision to mount loads of LPDDR5X memory, higher than AMD's Instinct MI450X and Vera Rubin.
At the same time, Crescent Island will be a PCI Express add-in card with a 350W power target, placing its power and thermal requirements close to products like Nvidia's RTX Pro 5000 Blackwell card.
Intel describes Crescent Island as "coming soon" and has touted a second-half 2026 launch for the platform, so we'll presumably learn more about the product and the ecosystem building around it as we progress further into the year.
Intel Crescent Island will do pre fill for the SambaNova RDU rack
SambaNova has relucked back into a good architecture for the current models
Intel not mentioning the node of Crescent Island implies that it's N2P
JUST IN: $INTC Intel highlighted integration/support for $NVDA Nvidia Dynamo with its upcoming Crescent Island AI inference GPU (Xe3P architecture, up to ~160GB LPDDR5X memory, sampling H2 2026).
Intel is contributing to Dynamo to enable heterogeneous AI inference, mixing different hardware (e.g., Intel GPUs/CPUs and Nvidia GPUs) in the same cluster.
This allows systems where, for example, Nvidia GPUs handle prefill and Intel accelerators (or vice versa) handle decode, optimizing for cost, power, and performance-per-watt.
Intelโs Crescent Island is positioned as a power-efficient, air-cooled inference GPU using cheaper/high-capacity LPDDR5X (to avoid HBM shortages/costs). Dynamo helps orchestrate it alongside Nvidia hardware via NIXL for data transfers.
Intel Xeon 6 CPUs are host options in Nvidia DGX systems, and support for heterogeneous setups in AI factories.
The Intellionaire Ep. 33: Intel, GaN & Power Semis
How $INTC fits into the Power Semi & RF arena, including the possible tie-in with SpaceX!
https://t.co/TJeoUc6daZ
Nvidia CEO Jensen Huang is expected to reveal fresh details about the upcoming Feynman GPU, and new Arm-based N1X chip for Windows PCs today during his GTC Taipei keynote speech, media report, noting Nvidia, Arm and Microsoft all posted โNew Era of PCโ messages on their social media platforms. $NVDA $ARM $MSFT https://t.co/iVjNHWS6jB
What could be the next trillion-dollar industries?
Building on our research into the 12 arenas of future growth, weโve identified 18 emerging industries showing early signs of outsized potential. https://t.co/H4mRUnXfaH
HUAWEI has presented the Tau (ฯ) Scaling Law, a new principle for guiding the future development of the semiconductor industry by utilizing LogicFolding. https://t.co/cMdypx7gE6
Nvidiaโs new ARM-based chips: N1 & N1X specs LEAKED ๐จ
N1X:
- Up to 20 CPU cores
- Up to 48 SMs GPU (6144 CUDA cores)
- Up to 128GB LPDDR5X memory
- 45W to 80W TDP
N1:
- Up to 12 CPU cores
- Up to 20 SMs GPU (2560 CUDA cores)
- 18W to 45W TDP
The full N1X uses the same configuration as GB10 used in DGX Spark.
First Windows laptops powered by these chips are expected to debut next week.