🗞️ Here's an update
Tomorrow our CEO Marco Bonola will present Axbryd to the Silicon Valley investment community at the @SkyDeck_Cal Batch 14 Demo Day
https://t.co/3UcRabOKz5
Congrats to Alessandro Rivitti, @RoBBifulco , Angelo Tulumello, Marco Bonola & Salvatore Pontarelli, whose paper, "eHDL: Turning eBPF/XDP Programs into Hardware Designs for the NIC," received a Distinguished Paper Award from @ASPLOSConf '23! Read it here: https://t.co/4x5QYhoies
81% of IT leaders were directed to reduce or halt cloud spending by their C-suite, moving from public cloud providers to on-premises and hybrid solutions.
But are you ready to program your networking hardware on your own?
https://t.co/10XctzyBEi
Every good things must come to an end... and so it is with the @SkyDeck_Cal Batch 14 acceleration program 😢
Such a great opportunity of being part of this amazing cohort 🚀
https://t.co/RM3vsugJkE
Every good things must come to an end... and so it is with the @SkyDeck_Cal Batch 14 acceleration program 😢
Such a great opportunity of being part of this amazing cohort 🚀
https://t.co/RM3vsugJkE
For once, I am reading a paper version of our paper :)
In case you missed it, together with @axbryd and UniRoma Tor Vergata we wrote a paper about a computer architecture specialized for the execution of packet processing programs.
Why is this relevant? 1/N 🧵
Our work on eBPF Program warping, today at @usenix#ATC2022: https://t.co/OtHGVG2w17
AKA, how to run eBPF programs up to 18x faster on #FPGA, compared to hXDP. Spoiler: the first instructions of many programs are just comparisons and read ops, and we modify hXDP for that!
Excited to be in Carlsbad at the @usenix ATC/OSDI '22 with @axbryd to present our work "Faster Software Packet Processing on FPGA NICs with eBPF Program Warping"
We are excited to share that our paper "Faster Software Packet Processing on #FPGA NICs with #ebpf Program Warping" has been accepted at the 2022 #USENIX Annual Technical Conference (#ATC22)
Check out our latest collaboration to be presented at the #EuroP4 demo session : "Pushing Network Programmability to the limits with SRv6 uSIDs and P4" @P4lang@SegmentRouting
🌟 The program of #EuroP4 is online, see: https://t.co/jEXTUhQbMs. From quantum communication to job scheduling (purely in P4!) and 1+1 protection, 7 papers and 6 posters/demos! Join us, we offer registration grants! @P4lang@APSnetworks@fvramos_ulx@n4noa@ACMSIGCOMM#CoNEXT
If you liked our #osdi20 paper stay tuned for our next two papers at #CoNEXT2020: “When Filtering is not Possible Caching Negatives with Fingerprints Comes to the Rescue” and “Metronome: adaptive and precise intermittent packet retrieval in DPDK”
If you liked our #osdi20 paper stay tuned for our next two papers at #CoNEXT2020: “When Filtering is not Possible Caching Negatives with Fingerprints Comes to the Rescue” and “Metronome: adaptive and precise intermittent packet retrieval in DPDK”
If you liked our #osdi20 paper stay tuned for our next two papers at #CoNEXT2020: “When Filtering is not Possible Caching Negatives with Fingerprints Comes to the Rescue” and “Metronome: adaptive and precise intermittent packet retrieval in DPDK”
Congratulations to Jay Lepreau Best Paper award winner "hXDP: Efficient Software Packet Processing on FPGA NICs" (M. Spaziani Brunella, G. Belocchi, M. Bonola, S. Pontarelli, G. Siracusano, G. Bianchi, A. Cammarano, A. Palumbo, L. Petrucci, & R. Bifulco)! #osdi20
I am happy that our @usenix#osdi20 paper "hXDP: Efficient Software Packet Processing on FPGA NICs" has received the three artifact evaluation bages: available, functional, reproduced. Thanks to the collaborators at @NEC_corp labs Europe and at @axbryd. 1/5
We will present our FlowBlaze open source technology at @USENIX@NSDI on the 27 Feb. Check the NSDI paper and the GitHub repo for more details (https://t.co/5HNi0kYHzx)
#FlowBlaze#NFV#NSDI#SDN