One gigawatt of AI used to be ~$18bn of revenue for NVIDIA (Hopper). Grace Blackwell: ~$25bn. Vera Rubin: ~$40bn.
Same power, 2.2x the dollars.
So what does a full GW cost, who gets the rest, and why would anyone pay up? ↓
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@jukan05 Read the 50% as a split. Half the capacity sits under multi-year deals priced within agreed ranges: the floor. The other half sells into a market SK hynix sees short "through 2030": the upside.
Memory cycles broke on price, not volume. Half of that price risk is now contracted.
Three signals that move the Q-Day clock:
1. >100 logical qubits with error below 1 per million cycles
2. a new 256-bit curve estimate built with the AI-found circuits Google and Harvard posted in Oct
3. the 2035 deadline to retire RSA and ECC moving earlier
Q-Day likely starts with elliptic curves, not RSA.
A Mar 2026 design could break a 256-bit curve in a few days with 26,000 atom qubits (Caltech/Oratomic). On the same machine, RSA takes 1-2 orders of magnitude longer.
#QuantumComputing#Cryptography
Newest data point (Quantinuum, Oct 16): logical error fell 12x each time the code grew one size, to 5 per million cycles. Google's Willow did 2.1x. Attack estimates assume ~10x.
That pace now exists on real hardware. Caveats: preprint, 73 qubits, 3 failures in 29,000 runs.
@MelvinInvests What stands out: H200 and B200 rents rose while newer chips kept shipping. New supply isn't eating the old fleet.
That's what inference looks like when it behaves like consumption, not a one-off training build. Old GPUs don't retire. They move to serving.
@MelvinInvests The most bullish line is the oldest one. A100 launched in 2020 and still rents above its own 6-yr line.
That's software at work: CUDA keeps old GPUs productive, which is why lenders now take them as collateral. More on that here: https://t.co/LLay6xGzrO
CUDA turns 20 in November. NVIDIA says 11 million developers now build on its platform.
Yet most AI engineers never write a line of CUDA. They write PyTorch.
The moat isn't the language. It's the layers under PyTorch, re-tuned by NVIDIA for every new chip. ↓
What SK hynix sees for 2027:
→ DRAM "achievable demand" bits up mid-20% y/y; NAND up high-teens
→ Long-term deals with 14 customers cover over 50% of 2027-28 capacity, priced within agreed ranges
→ Capex up "significantly"
→ Demand above supply "through 2030"
@StockSavvyShay Same shortage, one step removed.
By 2027, ~30% of DRAM wafers make HBM, up from ~20% (Samsung exec). HBM needs ~3x the wafer per bit (Micron). At flat wafers, regular DRAM loses ~12.5% of its wafers.
That's the pool they're trying to lock up:
https://t.co/m8zLm8loeR
HBM eats DRAM twice.
By 2027, ~30% of DRAM wafers will make HBM, up from ~20% now (a Samsung executive, Sep 29). But HBM needs ~3x the wafer per bit.
So 30% of the wafers become only ~12.5% of the bits. ↓
#HBM#Semiconductors
A developer warns of extinction, and suddenly everyone imagines AI as a creature with motives.
The Inscrutable Machine predicted this mistake: confusing emergent behavior with a mind. Anthropomorphizing AI blinds us from the actual risks.
Stories and reflections on AI
Sources: Samsung exec, Sep 29, 2026 https://t.co/BE8UsKMwSt · Micron, Mar 2024 call · CXMT IPO https://t.co/3WA44EyZf9
Bit math is my estimate. Not investment advice.
HBM eats DRAM twice.
By 2027, ~30% of DRAM wafers will make HBM, up from ~20% now (a Samsung executive, Sep 29). But HBM needs ~3x the wafer per bit.
So 30% of the wafers become only ~12.5% of the bits. ↓
#HBM#Semiconductors
What to watch:
→ SK hynix 3Q26, Oct 28 (Seoul): regular DRAM vs HBM bit growth
→ HBM4: above 3x wafer per bit, regular DRAM gets tighter
→ CXMT's HBM3E: if it scales, the twist fades