Our paper “SPIKER-LL” is on arXiv, adding STSF local learning to Spiker+ for on-device SNN training with low hardware overhead, DSP-free and sub-ms. Congrats to Alessio Caviglia and Filippo Marostica.
Presenting at ISVLSI 2026 and DAC 2026.
https://t.co/fD3zdy2K7B
Training SNNs is hard — fairly comparing training algorithms is harder. 🧠
NeuroTrain is now on arXiv, introducing an open snnTorch benchmark for reproducible evaluation of local learning rules.
Paper: https://t.co/3vxsFXcacM
Code: https://t.co/OsQ1TpH3HF
#SNN#NeuromorphicAI
Excited to share our preprint:
Elastic Spiking Transformers for Efficient Gesture Understanding
A runtime-adaptive spiking architecture for efficient edge gesture understanding.
To be presented at IEEE FG 2026.
Preprint: https://t.co/yPlSFt8w6k
#NeuromorphicComputing#SNN
TCAL organized an invited seminar at CEID on the topic of “Reliable Computing Systems for Space Applications”. The talk was delivered by Dimitris Agiakatsikas from SOLIDKOSMOS S.A.
https://t.co/Bn9zKtuLgn
#ComputerArchitecture#Aerospace#CPU#FPGA#Reliability#ESA#CEID
Check out our latest article on how simulation frameworks based on gem5 are leveraged in the Neuropuls project to extract key metrics such as latency and energy consumption of RISC-V-interfaced photonic accelerators. https://t.co/fJnsji01c8
China's #SpacemiT develops 64-core RISC-V datacenter CPU — 12nm chip allegedly performs like a 10-year old Xeon or Opteron but with higher core count #riscv#datacenter#ai#cpu#intel#amd https://t.co/LLKtFtZoRg
We’re thrilled about the REBECCA project’s presentation at EFECS 2024! 🎉 The team showcased advancements in RISC-V systems, chiplet technology, and tools for safety and security, sparking meaningful discussions. 🚀👏 @Chips_JU
#REBECCAProject#EFECS2024#Innovation#RISC-V
📢Call for Workshops & Tutorials📢
Submission Deadline: January 31, 2025
Notification: February 14, 2025
Workshops & Tutorials Dates: June 21-22, 2025
For more details, please see here: https://t.co/VKujBivLwL
Updates from our lab's work on @VitaminVProject: the RISC-V hypervisor (H) extension is now fully implemented on gem5 (will go public on gem5 repo). Baremetal (type-1) hypervisor (Xvisor) up and running, hosting VMs and workloads! Stay tuned.
The MICRO hotcrp website is officially open! 🚀 We're awaiting your best work!
https://t.co/fnk8HTriwd
Abstract Deadline: April 11, 2024 at 11:59 PM CDT
Full Paper Deadline: April 18, 2024 at 11:59 PM CDT
During the ”RISC-V Summit Europe 2023” in Barcelona in June, 2023, the NKUA team presented a poster entitled ”Enabling Design Space Exploration of RISC-V Accelerator-rich Computing Systems on gem5”. 📄
The poster presents one of the main aspects of the Neuropuls project.✅
We won the IEEE Transactions on Computers Best Paper Award for year 2022 by the IEEE CS Publications Board for our lab's paper https://t.co/Rzd7SP19NP.🚀🏆. An incredible recognition for joint research among U Athens, UFRGS, U Trento.
Lab's collaborative work from IEEE Transactions on Computer (Oct 2022), recognized in the IEEE Computer Magazine July 2023 issue "Spotlight to Transactions" column! https://t.co/YvkkJ5cbF5; Kudos to all authors: P.R.Bodmann, G.Papadimitriou, R.L.Rech Jr, D.Gizopoulos, P.Rech.