Top Tweets for #ChipIgnite

over 2 years ago

@hackaday Time to have FOSS Z80 chip! https://t.co/GIfFEoV7MO https://t.co/QqLB4DUF70 Tech info: * CMOS 130nm via #TinyTapeout 07 / @efabless #ChipIgnite * ~4K logic gates * fits in 0.064 mm^2 * up to 48 MHz Github: https://t.co/fPy9FRqO6p

__ReJ__'s tweet photo. @hackaday Time to have FOSS Z80 chip!

https://t.co/GIfFEoV7MO

https://t.co/QqLB4DUF70

Tech info:
* CMOS 130nm via #TinyTapeout 07 / @efabless
#ChipIgnite
* ~4K logic gates
* fits in 0.064 mm^2
* up to 48 MHz

Github: https://t.co/fPy9FRqO6p https://t.co/XJseLxLj0l

over 2 years ago

Left: the open-source Z80 core on 130 nm process inside a multi-project @tinytapeout chip. Goes into fabrication in June. Right: the original Z80 from 1976 on 4 um (4000 nm) process. Matching scale.

__ReJ__'s tweet photo. Left: the open-source Z80 core on 130 nm process inside a multi-project @tinytapeout chip. Goes into fabrication in June.

Right: the original Z80 from 1976 on 4 um (4000 nm) process.

Matching scale. https://t.co/J9ndrgvjb2

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over 2 years ago

More details: https://t.co/mvPnzkzi66 1) CMOS 130nm via #TinyTapeout 07 / @efabless #ChipIgnite 2) ~4K logic gates 3) fits in 0.064 mm^2 ~ roughly 4 TT tiles 4) should run at 48 MHz

over 2 years ago

I threw a quick test for Z80 tapeout using existing open-source core TV80: 1) CMOS 130nm via #TinyTapeout 07 / @efabless #ChipIgnite 2) ~4K logic gates 3) fits in 0.064 mm^2 ~ roughly 4 TT tiles 4) according to sim should run at 48 MHz Check it out: https://t.co/fPy9FRqO6p

__ReJ__'s tweet photo. I threw a quick test for Z80 tapeout using existing open-source core TV80:
1) CMOS 130nm via #TinyTapeout 07 / @efabless #ChipIgnite
2) ~4K logic gates
3) fits in 0.064 mm^2 ~ roughly 4 TT tiles
4) according to sim should run at 48 MHz

Check it out: https://t.co/fPy9FRqO6p https://t.co/5SusvRPdLz

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over 2 years ago

I threw a quick test for Z80 tapeout using existing open-source core TV80: 1) CMOS 130nm via #TinyTapeout 07 / @efabless #ChipIgnite 2) ~4K logic gates 3) fits in 0.064 mm^2 ~ roughly 4 TT tiles 4) according to sim should run at 48 MHz Check it out: https://t.co/fPy9FRqO6p

over 2 years ago

Now, open-source silicon-proven Z80 clone would be a worthy project for #TinyTapeout 07. It opens tomorrow and we have 6 weeks :) Shouldn’t be hard with existing HDL open-source clones & die-shots of Z80.

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over 2 years ago

📣 Announcing the 4th AI Generated Open-Source Silicon Design Challenge. Leverage generative AI to develop an open-source HW accelerator for Keyword Spotting. https://t.co/Wkxe4WtXQp #ArtificialIntelligence #chatgpt4 #chipIgnite #keywordspotting

efabless's tweet photo. 📣 Announcing the 4th AI Generated Open-Source Silicon Design Challenge. Leverage generative AI to develop an open-source HW accelerator for Keyword Spotting. https://t.co/Wkxe4WtXQp

#ArtificialIntelligence #chatgpt4 #chipIgnite #keywordspotting https://t.co/3UMvejthCE

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Matthew Venn @matthewvenn

over 2 years ago

Unlock the secrets to streamlined chip design with chipIgnite! Join Jeff & @matthewvenn to explore how its features support cost-effective & rapid chip development and prototyping. https://t.co/d5x0wCuBja #webinar #chipdesign #chipignite #rtldesign

efabless's tweet photo. Unlock the secrets to streamlined chip design with chipIgnite! Join Jeff & @matthewvenn to explore how its features support cost-effective & rapid chip development and prototyping. https://t.co/d5x0wCuBja

#webinar #chipdesign #chipignite #rtldesign https://t.co/VQpVS3Hvev

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over 2 years ago

All made possible with #opensource tools, @efabless #chipIgnite and our wonderful community!

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almost 3 years ago

Ready to Ignite Innovation? 🔥 #ChipIgnite CI 2311 is NOW OPEN for submissions! https://t.co/UQxCAwvNP1 #icdesign #asics #hardwaredesign

efabless's tweet photo. Ready to Ignite Innovation? 🔥 #ChipIgnite CI 2311 is NOW OPEN for submissions!
https://t.co/UQxCAwvNP1

#icdesign #asics #hardwaredesign https://t.co/1ddU3P05m1

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Matthew Venn @matthewvenn

over 3 years ago

Join the AI Generated Open-Source Silicon Design Challenge! via @DanielNenni https://t.co/s1lxoTkjF1 #CaravelUserProject #ChipIgnite #DFFRAM #Efabless #GenerativeAi #GPTSession #OpenLaneChipIgnite #SKY103

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SemiWiki @DanielNenni

over 3 years ago

Join the AI Generated Open-Source Silicon Design Challenge! https://t.co/Q7AJqy8r0C #CaravelUserProject #ChipIgnite #DFFRAM #Efabless #GenerativeAi #GPTSession #OpenLaneChipIgnite #SKY103

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over 3 years ago

Forgot to mention in my open source silicon news update that the next @efabless #chipIgnite shuttle departs 24th April. Same shuttle we're putting #tinytapeout 3 on. 8 days left to get your designs in! https://t.co/tejc1r51TE

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Matthew Venn @matthewvenn

almost 4 years ago

#TinyTapeout 2 is on the way! Checkout the new website: https://t.co/vOL5zS1quc Thanks to @efabless for sponsoring the project and helping us get chips made with their #chipIgnite shuttle service!

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about 4 years ago

#caravel is famous ... Local News TV Star! @NYSTEC @NYCreates #NYDESIGN @efabless #chipignite Watch the whole Caravel News below :-) https://t.co/RlZayrzELr

mkkassem's tweet photo. #caravel is famous ... Local News TV Star!
@NYSTEC @NYCreates #NYDESIGN @efabless #chipignite

Watch the whole Caravel News below :-)
https://t.co/RlZayrzELr https://t.co/cpOr1Mgk2T

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over 4 years ago

Caravel bring up day at Stanford. Go EE272B Team!!⚙️ Some are duplicates but so be it 🙂 #chipIgnite #sky130 #caravel #opensourcechips https://t.co/Wb9YJCDGoO

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GroupGets

@groupgetscom

over 4 years ago

New era of #DIY #hardware achievement unlocked! The #groupbuy for CLEAR, the #OpenSource #fpga #asic by @efabless #chipIgnite, is now fully funded with just a day to go!⏱️ https://t.co/4viqmO2nQX @Hacksterio

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Hackster.io @Hacksterio

over 4 years ago

Join the @efabless group-buy for CLEAR by March 11th on @groupgetscom! CLEAR is a one-of-a-kind open-source FPGA ASIC that is both a functional dev board and a demonstration of how anyone can design their own ASIC through their #chipIgnite platform. 👉 https://t.co/f3jafDOGC5

Hacksterio's tweet photo. Join the @efabless group-buy for CLEAR by March 11th on @groupgetscom! CLEAR is a one-of-a-kind open-source FPGA ASIC that is both a functional dev board and a demonstration of how anyone can design their own ASIC through their #chipIgnite platform.
👉 https://t.co/f3jafDOGC5 https://t.co/d2jfZyxTci

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over 4 years ago

@WestonBraun Good job! This awesome. #chipignite

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over 4 years ago

Hello Hello Hello #Caravel #chipIgnite #openMPW

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over 4 years ago

Join our Webinar Series "Starting Your Project for chipIgnite or Open MPW" The first one is on Wednesday Feb 2, 2022. Sign Up Here: https://t.co/U3bQfvPSBL #chipignite #openlane #openroad #google #efabless

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