#ORConf - Twitter Hashtag

9 months ago

Full house in Valencia at this year's @FossiFoundation #ORConf, where both our talks today enjoyed a great audience and feedback. Read more on coverage reporting in Verilator (https://t.co/JWAbDqxabH) and Antmicro's open source digital design tooling (https://t.co/q2IW6cdIKR)

antmicro's tweet photo. Full house in Valencia at this year's @FossiFoundation #ORConf, where both our talks today enjoyed a great audience and feedback. Read more on coverage reporting in Verilator (https://t.co/JWAbDqxabH) and Antmicro's open source digital design tooling (https://t.co/q2IW6cdIKR) https://t.co/uyuI6V4pld

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Antmicro @antmicro

9 months ago

In our 2nd @FossiFoundation #ORConf talk, we'll show recent updates in the steady progress towards UVM support, constrained randomization support, enhancements to coverage reporting, and improved facilities for power estimation workflows https://t.co/ylWCpqLl9V

antmicro's tweet photo. In our 2nd @FossiFoundation #ORConf talk, we'll show recent updates in the steady progress towards UVM support, constrained randomization support, enhancements to coverage reporting, and improved facilities for power estimation workflows https://t.co/ylWCpqLl9V https://t.co/UBZbDQaiML

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Antmicro @antmicro

10 months ago

Join our @FossiFoundation #ORConf talk where we demonstrate a complete set of open source, vendor-agnostic tools allowing to automatically overview, document and analyze digital design development: Topwrap for SoC aggregation, PeakRDL, uvmdvgen, Testplanner, Coverview & @renodeio https://t.co/bEhVvc3rvT

antmicro's tweet photo. Join our @FossiFoundation #ORConf talk where we demonstrate a complete set of open source, vendor-agnostic tools allowing to automatically overview, document and analyze digital design development: Topwrap for SoC aggregation, PeakRDL, uvmdvgen, Testplanner, Coverview & @renodeio https://t.co/bEhVvc3rvT

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Renode framework @renodeio

over 1 year ago

Renode is used for developing new ASIC-targeted IPs & SoCs. Watch our #ORConf talk on SystemC TLM and DPI interface support for interfacing SystemVerilog IP simulated with Verilator or other simulators via a range of bus interfaces https://t.co/j8C86aE6fz @FossiFoundation @risc_v

renodeio's tweet photo. Renode is used for developing new ASIC-targeted IPs & SoCs. Watch our #ORConf talk on SystemC TLM and DPI interface support for interfacing SystemVerilog IP simulated with Verilator or other simulators via a range of bus interfaces https://t.co/j8C86aE6fz @FossiFoundation @risc_v https://t.co/Fv8pGRQuQJ

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Antmicro @antmicro

over 1 year ago

Antmicro is an active contributor to open silicon. Watch our #ORConf talk on enhancing the @risc_v #VeeR EL2 core for @CHIPSAlliance's #Caliptra 2.0 with I3C, U-mode, and enabling open source verification: https://t.co/UYA5q75a3M @FossiFoundation @amd @google @microsoft @nvidia

antmicro's tweet photo. Antmicro is an active contributor to open silicon. Watch our #ORConf talk on enhancing the @risc_v #VeeR EL2 core for @CHIPSAlliance's #Caliptra 2.0 with I3C, U-mode, and enabling open source verification: https://t.co/UYA5q75a3M @FossiFoundation @amd @google @microsoft @nvidia https://t.co/DRGMvD3fHP

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Matthew Venn @matthewvenn

almost 2 years ago

Nearly managed to explain, draw and layout a cmos inverter in 3 minutes at @FossiFoundation #ORConf https://t.co/G6SaYmvQ3X

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Matthew Venn @matthewvenn

almost 2 years ago

My presentation at @FossiFoundation #ORConf is already published! https://t.co/H8aXa3pVa1

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Antmicro @antmicro

almost 2 years ago

Proudly sponsoring @FossiFoundation's #ORConf in Gothenburg this year, continously pushing the boundaries of open source digital design and industry collaboration. Meet our team this weekend and join the debate: https://t.co/Lag0OLz5yC

antmicro's tweet photo. Proudly sponsoring @FossiFoundation's #ORConf in Gothenburg this year, continously pushing the boundaries of open source digital design and industry collaboration. Meet our team this weekend and join the debate: https://t.co/Lag0OLz5yC https://t.co/0BYSaCuZMU

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PULP Platform @pulp_platform

almost 2 years ago

#ORConf 2024 by @FossiFoundation is approaching fast! It's 10th anniversary edition will take place in Gothenburg, Sweden 13- 15 September. See the schedule and register here to this great open source silicon event: https://t.co/KSeEfiBj7m

pulp_platform's tweet photo. #ORConf 2024 by @FossiFoundation is approaching fast! It's 10th anniversary edition will take place in Gothenburg, Sweden 13- 15 September. See the schedule and register here to this great open source silicon event: https://t.co/KSeEfiBj7m https://t.co/8NfjrRqqAL

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Antmicro @antmicro

over 2 years ago

During #ORConf we discussed #opensource tools used in the #Caliptra RoT project. Watch the video to learn about progress in the project & tools for testing, verification & firmware validation: https://t.co/BiVqcJ3t1j @FossiFoundation @CHIPSAlliance @Google @nvidia @Microsoft @AMD

antmicro's tweet photo. During #ORConf we discussed #opensource tools used in the #Caliptra RoT project. Watch the video to learn about progress in the project & tools for testing, verification & firmware validation: https://t.co/BiVqcJ3t1j @FossiFoundation @CHIPSAlliance @Google @nvidia @Microsoft @AMD https://t.co/CVRsIJ6auU

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Antmicro @antmicro

over 2 years ago

Missed our talk on CHIPS Alliance #opensource digital design tooling during #ORConf? You can watch a video to learn about developments by the Tools Workgroup in @CHIPSAlliance projects such as #risc_v-DV, #Verible, #SystemVerilog https://t.co/Xg6SRotrpc @FossiFoundation @risc_v

antmicro's tweet photo. Missed our talk on CHIPS Alliance #opensource digital design tooling during #ORConf? You can watch a video to learn about developments by the Tools Workgroup in @CHIPSAlliance projects such as #risc_v-DV, #Verible, #SystemVerilog https://t.co/Xg6SRotrpc @FossiFoundation @risc_v https://t.co/er9y5gMdVS

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PULP Platform @pulp_platform

over 2 years ago

Davide's talk @duav_red "Ten Years of PULP: The Evolution of the Species from IoT to HPC" presented at #ORConf 2023 in Munich🍺is now on Youtube. Check it out: https://t.co/IcLgxrOLtZ You can find the slides on our website: https://t.co/lkJ97Hnz4D

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Antmicro @antmicro

over 2 years ago

Our third #ORConf talk discussed #opensource design testing & verification w/ UVM & Verilator. Learn about the status towards full #UVM support & improvements such as testing speed acceleration for complex digital designs: https://t.co/psJfZksmQQ @FossiFoundation @CHIPSAlliance

antmicro's tweet photo. Our third #ORConf talk discussed #opensource design testing & verification w/ UVM & Verilator. Learn about the status towards full #UVM support & improvements such as testing speed acceleration for complex digital designs: https://t.co/psJfZksmQQ @FossiFoundation @CHIPSAlliance https://t.co/4PQhkUhvTQ

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Matthew Venn @matthewvenn

over 2 years ago

Had a great #tinytapeout workshop at @FossiFoundation #orconf!

Leon Anavi @leonanavi

over 2 years ago

🚀 Amazing #tinytapeout workshop by @matthewvenn at @FossiFoundation #orconf 2023 🎉 Nowadays chip design is accessible to newcomers at very affordable prices https://t.co/OJxPsouMbr

leonanavi's tweet photo. 🚀 Amazing #tinytapeout workshop by @matthewvenn at @FossiFoundation #orconf 2023
🎉 Nowadays chip design is accessible to newcomers at very affordable prices https://t.co/OJxPsouMbr https://t.co/mAfP860kks

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Leon Anavi @leonanavi

over 2 years ago

🚀 Amazing #tinytapeout workshop by @matthewvenn at @FossiFoundation #orconf 2023 🎉 Nowadays chip design is accessible to newcomers at very affordable prices https://t.co/OJxPsouMbr

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PULP Platform @pulp_platform

over 2 years ago

Good morning! The slides from Davide's @duav_red talk at #ORConf in Munich 🍻 are now online. See for yourself "Ten years of PULP: The Evolution of the Species from IoT to HPC" https://t.co/lkJ97Hnz4D

pulp_platform's tweet photo. Good morning! The slides from Davide's @duav_red talk at #ORConf in Munich 🍻 are now online. See for yourself "Ten years of PULP: The Evolution of the Species from IoT to HPC" https://t.co/lkJ97Hnz4D https://t.co/nnrwnie4Ns

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Matthew Venn @matthewvenn

over 2 years ago

Exploring 1990s wafers at @FossiFoundation #orconf 60 euro maximum value!

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Matthew Venn @matthewvenn

almost 3 years ago

First @FossiFoundation #ORConf videos are already posted! https://t.co/puFAyQvTxc

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FOSSi Foundation @FossiFoundation

almost 3 years ago

Final preparations for #ORConf, starting tomorrow (Friday), are done! Doors open at 9am, talks start at 10am. Have a look at https://t.co/RwnaIthxd3 to learn how to get to the venue and preview the schedule. See you tomorrow! (Or on YouTube after the event.)

FossiFoundation's tweet photo. Final preparations for #ORConf, starting tomorrow (Friday), are done! Doors open at 9am, talks start at 10am. Have a look at https://t.co/RwnaIthxd3 to learn how to get to the venue and preview the schedule. See you tomorrow! (Or on YouTube after the event.) https://t.co/Z2HrqdSniU

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Antmicro @antmicro

almost 3 years ago

Our 2nd talk at #ORConf discusses @CHIPSAlliance #opensource digital design tooling updates. Learn about recent developments by the Tools Working Group's projects such as #RISCV-DV, #Verible, #SystemVerilog synthesis, & more: https://t.co/7Vc0RdJ5vL @FossiFoundation @risc_v

antmicro's tweet photo. Our 2nd talk at #ORConf discusses @CHIPSAlliance #opensource digital design tooling updates. Learn about recent developments by the Tools Working Group's projects such as #RISCV-DV, #Verible, #SystemVerilog synthesis, & more: https://t.co/7Vc0RdJ5vL @FossiFoundation @risc_v https://t.co/c7r2gcenWZ

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