#arty7 - Twitter Hashtag

Cool now my #riscv #r32im supports byte, half and word. lb lh lw lbu lhu sb sh sw zero-extended and msb-extended and I can print strings :) my workaround before was to use always 32 bit words for each load and store commands #ice40 #arty7 #lattice #xilinx #fpga

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Logic Destroyer — Proven in Silicon.

@splinedrive

about 5 years ago

Test of my #riscv #rv32im on my #arty7 with 100MHz default frequency and is running the division and multiplier c code with #uart. But vivado eats your live time. I love yosys and nextpnr for lattice. But vivado is nice to explore your design

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Logic Destroyer — Proven in Silicon.

@splinedrive

over 5 years ago

#hdmi everywhere #tmds ported my_hdmi implementation to #arty7 #vivado is amazing in exploring your #rtl #xilinx I have also made a Makefile for #yosys and #nextpnr but it terminates with unable to place cell of type #oddr :( . Compiling would be 100 :) faster with #opensource

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Logic Destroyer — Proven in Silicon.

@splinedrive

over 5 years ago

Ready to run my new board #arty7...I love #xilinx, #nextpnr, #yosys, #prjxray, #vt220,#vim,#tmux,#spacevim,#ubuntu ... played yesterday with #vivado and felt uncomfortable:(

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Logic Destroyer — Proven in Silicon.

@splinedrive

over 5 years ago

I started for one year ago with #FPGAs and like them and become a #junkie. I want to play with #vivado for fun. #xilinx #arty7 #100T @TrenzElectronic my dealer. My favorites are #blackicemx and #ulx3s. But #xilinx is the #force!!!