LorenzoElectronics

ATE system house and PCB test service provider. Offering an ATE Integrating In-circuit Test and Boundary Scan Test functions.

[LorenzoElectronics @LorenzoElectron]

https://t.co/2pwmVFLHgR

[LorenzoElectronics @LorenzoElectron]

Lorenzo 1210 features #ateboundaryscantests https://t.co/EiMSO64I8B via @SlideShare

[LorenzoElectronics @LorenzoElectron]

https://t.co/ekiV04cQb6

[LorenzoElectronics @LorenzoElectron]

https://t.co/qTlIiaEEuS

[LorenzoElectronics @LorenzoElectron]

@chmhsieh LV convention is OK, but expensive. Need other ways to do marketing. I'll visit Fort Worth next month. it's a much easier trip.

[LorenzoElectronics @LorenzoElectron]

@chmhsieh How did you recognize me. good to see you here. As you might know me from FB, I am just back from 2750 miles Vegas driving trip.

[LorenzoElectronics @LorenzoElectron]

Now my tester can mix In-circuit Test with Boundary Scan Test. Driving ICT can be detected by BST, or vice versa ==> increased test coverage

[LorenzoElectronics @LorenzoElectron]

I used a USB/JTAG pod in FPGA flash programming. It's conveniently converted into a boundary scan test controller.

[LorenzoElectronics @LorenzoElectron]

So I build a single board ICT tester. It has FPGA farm for digital testing. With few A/D and D/A chips, analog test functions are added.

[LorenzoElectronics @LorenzoElectron]

Test program interpreter is easy to port. DOS command based test execution has to run under GUI control - multi-thread with IPC.

[LorenzoElectronics @LorenzoElectron]

My ancient design of ICT tester using DOS / PC-AT bus / TTL chips is terribly outdated. So I moved to Windows / USB-SOC / FPGA.