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開11年的卡盒 & 掰咖的觀眾幫我抽 中一張超大的！Emerald Break - XY6 https://t.co/SMM5ERVr21 來自 @YouTube

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今回分は6月30日〆切

[郭明錤｜Ming-Chi Kuo @mingchikuo]

My latest industry checks indicate that MediaTek has upgraded the strategic positioning of its AI business from "IC / ASIC design" to "system-level design," initially targeting the PCBA (L6) for Google's TPU and the L10 rack for Elon Musk-affiliated companies' in-house AI chips.

Overall, this strategic shift aligns with industry trends and, if executed well, should help strengthen MediaTek's customer relationships and long-term competitive advantage.

Industry checks and analysis:

▎This is a long-term play, with immaterial impact on fundamentals over the next two years. The aim is to capture new growth opportunities while mitigating potential risks.

1. Opportunity: Two factors are jointly raising the value-add of system-level design: increasing server rack design complexity, driven by the adoption of technologies such as CPO and 800V HVDC, and refresh cycles comparable to those of consumer electronics.

2. Risk: Growth momentum in ASIC design may begin to slow in 2–3 years as the Semi-COT business model takes hold.

3. To secure a gross margin of at least 40–50% in its system-level integration business, MediaTek is expected to adopt an asset-light model in which it leads design and validation, leverages the strengths of Taiwan's hardware supply chain ecosystem, and outsources manufacturing.

▎Google TPU PCBA:

1. MediaTek aims to begin with TPU v10 (Icefish), while also pursuing the integration of its own CPO solution.

2. Google's hardware assembly ecosystem is already well-established, so MediaTek's chances of winning L10 are slim.

▎The L10 rack for Musk's in-house AI chips:

1. The AI compute currently being built out by Musk's companies relies mainly on Nvidia chips, so the assembly ecosystem for their own AI chip racks is not yet in place, and that's where MediaTek's opportunity lies.

2. This business still lacks clear timeline visibility. Long-term success will hinge on whether MediaTek can leverage Taiwan's hardware supply chain ecosystem and its partnership with Terafab to land L10 rack orders.

[郭明錤｜Ming-Chi Kuo @mingchikuo]

關於台積電的次世代先進封裝 CoPoS 的幾個關鍵（省略可查詢到的技術細節）：

1. 預計 2H28 量產，目標提升 9.5 倍光罩尺寸以上的封裝之量產經濟性，Nvidia 的 AI 晶片 Feynman 可能將首度採用。

2. 根據產業調查，兩個不同的地方會用到玻璃（尺寸 mm）：
→ 310 x 310 的臨時玻璃載具（glass carrier）
→ 250 x 250（測試）/ 510 x 515（量產）的玻���面板，加工後切割為玻璃核心載板（glass core substrate）

3. 玻璃核心載板的架構主要分成三層：玻璃作為核心層，上下以 ABF（ABF-GCP）增層包覆。玻璃加工的挑戰，像是TGV（through glass via）、填銅 / 金屬化（metallization）等，指的都是這個階段。

4. CoPoS 常見的錯誤論述：
→ ❌ 錯誤 1：採用玻璃中介層（interposer）。⭕️ 應修正為：玻璃非中介層，其互連角色由晶片側 RDL 與玻璃核心載板側 TGV / ABF 增層分別承接。
→ ❌ 錯誤 2：玻璃取代 ABF。⭕️ 應修正為：如前述的玻璃核心載板架構，玻璃與 ABF 並存。
→ ❌ 錯誤 3：晶片放在玻璃上。⭕️ 應修正為：晶片貼附於玻璃核心載板的 ABF 增層表面。

5. CoPoS 將延續並強化台積電先進封裝的優勢，預期讓該優勢能見度可達約2032年。

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@Eng_china5 中共整天講鬼話都臉不紅氣不喘 厲害厲害

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[Terence Shen @Terenceshen]

反共館長陳之漢 vs 舔共館長陳之漢

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@kiss486 突然不意外了

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@Rumoreconomy 難怪

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拆卡挑战又来了 这次和Edison/David/Kevin一起拆了一箱Dynasty+一盒ToppsChrome Marvel，看看我们拆的怎么... https://t.co/e5nDHjXRvO 來自 @YouTube

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