onchip

Research group on integrated systems. Itsy-chipsy becoming a reality for 65nm, 130nm and 180nm. Keep tuned.

[onchip @onchipUIS]

Here some detailed views of the micro. It is cool to show around the complexity involved in this kind of project @Learn_Things #comunidadUIS

[Bret Victor @worrydream]

Dynamicland's new documentation space will go online on Sept 4.
As a prelude, here is a video about Dynamicland's precursor. https://t.co/cvCDnKVIcW

[SpaceX @SpaceX]

Watch Starship's fourth flight test https://t.co/SjpjscHoUB

[Nature Portfolio @NaturePortfolio]

A drug that is commonly used to treat tapeworm infections might help to prevent the formation of atypical fused cells in the lungs of patients with COVID-19, according to a paper published in Nature. https://t.co/CDJTWk0BlR

[Edmund Humenberger @ico_TC]

@pdp7 @GMahovlic My first working silicon designed and verified exclusively with open source tools.

[onchip @onchipUIS]

Tim Edwards from https://t.co/Oz6Xaf9kPD and @efabless made a great summary of why chip design still quite closed-sourced https://t.co/jX3vSfTvPI
He also introduces a lot of work done in order to get skywater-google endeavor works. https://t.co/nBxGoIAnCU

[onchip @onchipUIS]

NVRAM license macros for std CMOS are quite expensive. We have managed to get a small-macro-first-approach silicon-proven NVRAM cell. We even proved an NVRAM PUF concept with it. Presented at @IEEEISCAS #iscas2020:

https://t.co/yOJJWGLL8p

[Nevada Sanchez 🦋 @nevadasanchez]

An excellent article on the role of point of care ultrasound during the COVID-19 crisis.

[Krste Asanovic @kasanovic]

I put together a history of @SiFive for a CICC talk earlier this year, and now the video is up:
https://t.co/eOWyuCzHjZ #riscv

[onchip @onchipUIS]

@DavidPowellMeta @mithro @hackaday @ico_TC We are planning a more generic GPIO, for next tapeouts, that includes direct DAC capability with higher linearity and lower consumption.

[onchip @onchipUIS]

If you need a fast DAC, in terms of implementation and performance, for your testing activities, check this trick out: All-Digital FPGA-based DAC with None or Few External Components. BTW, you can do it with an MCU or similar @hackaday https://t.co/NWALFj3YrZ

[onchip @onchipUIS]

@DavidPowellMeta @mithro @hackaday @ico_TC As you summarized, it is a dirty quick trick for testing. We have solved many testing limitations for our chips. Current is a limitation for applications, the high-resolution bit will be limited by the GPIO power pins. Though in some MCUs you might be able to control GPIO current

[onchip @onchipUIS]

@HanxiaoM @hackaday @ico_TC Although we tested at 20MS/s which gives the maximum GPIO clock, larger bit resolution will be limited by static power.

[onchip @onchipUIS]

@FossiFoundation @mithro Tons of questions we will have. We have been discussing similar idea with few large foundries to make itsy-chipsy a real project. Although foundries will not open source PDK, there are few advances that we love to share.

[onchip @onchipUIS]

On building USB3+ and PCIe4 interfaces for low-cost tech nodes, the CDR is a hefty block to get it right. Jitter noise requires "massaging" to have a proper CDR response. Check our digital CDR and techniques to achieve stringent jitter specs: https://t.co/iBhmhjZX9I

[onchip @onchipUIS]

Love to see this: https://t.co/SPMqHFHQdy

For several reasons. Two of them:

1. Great data on Arm model to build up an SoC. Hiden before after NDA.
2. RISC-V pushing is working since Arm is pushing back. Great for everyone. Arm has great products!

IP just for TSMC 22nmULL.

[onchip @onchipUIS]

Detecting bugs and spec absences --> Simulation and Formal: The Best of Both Domains for Instruction Set Verification of RISC-V Based
Processors. We'd appreciate any feedback: https://t.co/66C9pte7yB Thanks @symbiotic_eda @zipcpu for formal training

[JM Rothberg @JMRothberg]

Molbio expert & #internship. Inspired by design of our at-home #coronavirus #test. Come Help. Guilford CT or my lab. In validation now @Yale, scaling in parallel. World needs early #virus detection. [email protected] or DM. #DIYBio #biohacking #python #DNA #SARSCoV2

[JM Rothberg @JMRothberg]

“Here’s a pic of kitting up the final components. QC data came out beautiful. Really excited for the @Yale data - huge kudos to the team.” At-Home #COVID19 #test. Yale will validate against laboratory standard. Scaling in parallel to empower everyone #Coronavirus @gatesfoundation

[onchip @onchipUIS]

If you like integrated circuits, here is the NetFlix of IC design (free for a limited time):

[IEEE SSC Society @SSCSociety]

All past SSCS webinar videos & slides, ISSCC short courses & tutorials, and SSCSedu Lecture series are FREE. For a limited time, non-members can take advantage of this great offer.

https://t.co/Knx5iJKiDb

[onchip @onchipUIS]

Bus protocols to allow direct communication among masters and slaves in low-energy applications. Compared to AHB-Lite/APB, a 5X clock cycle reduction when sending data from a peripheral module to another module at the system bus https://t.co/KKmimu9GuK