Tim 'mithro' Ansell

Open Source Hardware Geek

[gojimmypi @gojimmypi]

My latest gizmo arrived today!! This is the @tinytapeout FPGA development kit. It has a Lattice #UP5K FPGA on a PCB with headers and a pinout compatible with the Tiny Tapeout ASIC demo board.

[Owen Brake @OwenBrakes]

NoLoRa: Team from Edinburgh demonstrated LoRa transmission on MCUs with no radio chips, by utilizing the 27th harmonic of the SPI peripheral

[BreakingTaps @BreakingTaps]

@always_ff_rohan The final RTL is here: https://t.co/O55j1zW9oh

But it's transpiled from Spade which I haven't pushed to github yet (need to do some cleanup first). Will publish it soon

[BreakingTaps @BreakingTaps]

@r0b0t_sp1der Yep GF180! I used all open source tools, they provide a LibreLane/OpenRoad project template (https://t.co/IdxbUimBKi) that configures the build flow. Just drop in your RTL

I went from newbie to taped out in ~2 months. Steep learning curve but mostly the RTL side!

[BreakingTaps @BreakingTaps]

Stoked to get the packaged chips and see if they actually work! What a fun project, huge thanks to https://t.co/zqhKvaWHwB for making this possible!

[BreakingTaps @BreakingTaps]

Super zoomed in views are tough since the upper routing and dummy fill-metal obscure a lot of the neat details.

Going to try and delayer these with some manual lapping. We'll see how that goes, but since there are only 5 metal layers I'm hopeful we can get something usable 🤞

[BreakingTaps @BreakingTaps]

Corner art came out great! 😍

[BreakingTaps @BreakingTaps]

Hard to describe the feeling of holding silicon in your hand that you've designed 🥺

[logic destroyer @splinedrive]

StealthV

[psychogenic @PsychogenicTech]

Amazing @hackaday europe, in Lecco. @tinytapeout team meet (nothing like inperson), time with @mithro, old friends and new, even met some really cool guy with a swiss accent. Thanks to all who came for making it so awesome!

[tomorrow56 @tomorrow56]

「JLC2KiCad Web UI」を公開しました！

JLCPCB(EasyEDA)のPart Numberを指定するとKiCadの部品ライブラリ形式に変換する"JLC2KiCad"のWebUI版です。

ぜひ使ってみてください
https://t.co/Ty1zADFLIc

#Tsukutta #個人開発

[Tim 'mithro' Ansell @mithro]

You can make your own silicon with https://t.co/zIPAlPr7Qm too! Our second shuttle run is open at https://t.co/8QhIryRvFP with a new $4 USD per die option!

[Marcelo Samsoniuk @samsoniuk]

@splinedrive @mithro or a more aggressive 4:1 mux for ADDR/DATA into 16-bit and use 4-2-2-2 cycles for 4x32-bit burst, which may be in sync with an external SDRAM in case of cache miss...

[Marcelo Samsoniuk @samsoniuk]

@splinedrive @mithro well, I am waiting no less than a 3-4 chipset solution for an Amiga500-like machine, modernized with RISCV, SDRAM and VGA frame buffer! 🤣

[logic destroyer @splinedrive]

@mithro

next KianV Stealth performance SoC 👆 https://t.co/j6ltJjcbyU gf180mcu style

[Tim 'mithro' Ansell @mithro]

@Elon_Orbit @splinedrive I'm still trying to make it possible for people to get these dies all wire bonded together with COTS SPI flash and SRAM. That would solve the major issue being the limited amount of SRAM/flash you can fit on the 180nm process technologies.

[logic destroyer @splinedrive]

Forget GPUs. Map the RISC-V register file to HDMI, use it as a framebuffer, and blast RISC-V across the screen on a kianV bare-metal beast. @davepl1968

[Enjoy Digital @enjoy_digital]

Autotest of MicroPython firmware on Arty LiteX SoC (Testing simple peripherals and also Ethernet/SDCard).

[Tim 'mithro' Ansell @mithro]

You can make your own silicon with https://t.co/zIPAlPr7Qm too! Our second shuttle run is open at https://t.co/8QhIryRvFP with a new $4 USD per die option!

[logic destroyer @splinedrive]

First silicon just arrived.
These dies are from the first wafer of my GF180MCU based Linux SoC KianV, built with a fully open source ASIC flow.

This chip was part of the https://t.co/SclO7UxU5X GF180MCU run and hardware validation comes next.
Big thanks to Leo Moser for help with the ASIC flow and to @mithro and @evezor for their guidance along the way.
The picture shows the first dies. More bring up updates soon.

[logic destroyer @splinedrive]

First silicon just arrived.
These dies are from the first wafer of my GF180MCU based Linux SoC KianV, built with a fully open source ASIC flow.

This chip was part of the https://t.co/SclO7UxU5X GF180MCU run and hardware validation comes next.
Big thanks to Leo Moser for help with the ASIC flow and to @mithro and @evezor for their guidance along the way.
The picture shows the first dies. More bring up updates soon.