Webinar: Open Source for Cloud/Edge to support European Digital Autonomy: A snapshot from the CAPE, CHORYS, HIGHER projects.
Thursday, October 29, 2026 at 10:00 (CET)
👉 Read more and register here: https://t.co/1NDyGkhzCD
🧠 How can CXL disaggregated memory make cloud and HPC more flexible without compromising security? In this article we explore memory pooling, access controls and hardware-based safeguards for more secure, efficient infrastructure.
🔗 https://t.co/K8IZZszM8W
From prototype to Linux-powered microserver.
Building new RISC-V hardware is only part of the challenge. Getting storage, networking, firmware, and software working together is where the real integration begins.
This Featured Work highlights the RISER Microserver Platform and shares lessons learned while bringing up a standalone RISC-V system designed for cloud and accelerator research.
Explore the project and discover what the team learned along the way: https://t.co/hcLFC8sB2H
#RISCVFeaturedWork
🚀 HIGHER is at the #PEPRSynergyForum!
On 1 October, Olivier Deprez will present how HIGHER is building an open-standard European cloud & edge platform using #Arm and #RISC-V processors, open-source software and European semiconductor technology. 🇪🇺
The RISER project had the pleasure of hosting a workshop during the RISC-V Summit Europe last week. 👏A big thank you to the speakers and to everyone who attended the workshop. Slides are now available at: https://t.co/kXkZmuwtHq
"Towards a European Open Infrastructure: Insights from HIGHER, CAPE, and CHORYS" will be presented by Jens Hagemeyer, Manolis Marazakis, and Philippe Bonnet
🗓️ Thursday, April 30 | 13:35–13:50 | Level P1 – Room 133+134
See you in Barcelona!
@HiPEAC '26 is next week! CompContinuum: Computing Continuum of Cloud, Edge, and IoT Technologies. @ICS_FORTH presenting perspectives from the RISER and @higherEUproject.
🗓️Jan. 26 | 14:00-17:30 | room: “Extra 1” – ICE Kraków
https://t.co/tCAqnyHRut
@HiPEAC 2026 is next week! With HIGHER presenting at the CONCERTO: Projects Cross-Synergy in Advancing Exascale Platforms and Quantum Computing workshop.
🗓️January 26 – 28, Kraków, Poland
https://t.co/nQMB8UygzJ
Last week, we hosted an online workshop in association with @hipeac 'Towards the Next-Gen European Cloud: Open Platforms & Digital Sovereignty.”
All recorded presentations are now available here: 👉 https://t.co/3CPQAnXYrD
💻The 3rd RISER workshop: “Towards the Next-Gen European Cloud: Open Platforms & Digital Sovereignty.” Hosted by HiPEAC. Hear from FORTH , RISE, Semidynamics, SiPearl, & CloudSigma.
Find out more and register here 👉 https://t.co/OzNZDXt34f
🗞️@ICS_FORTH details the integration of the Caliptra Root-of-Trust into OCP-based DC-SCM secure control modules. A major step toward EU-built, open, secure, energy-efficient cloud-to-edge platforms powered by Arm & RISC-V.
Read more 👉 https://t.co/jBtvMq8yax
Excited to share that @ICS_FORTH presented at the 7th CANOPIE-HPC Workshop during #SC25 "Evaluating HPK for Running Cloud-Native Workloads on SLURM clusters" - bridging the cloud/HPC divide without partitioning resources.
🔗 https://t.co/UEbKpkKQLq
🚀 We are advancing modular, secure & energy-efficient European server design integrating SiPearl's Host Processor Modules (HPMs) within OCPs DC-MHS standard to power next-gen AI & HPC infrastructure. 🔗 Read more: https://t.co/mvNXVZCvdP
@RISE_SICS and @2crsi made an impact at this year's OCP Global Summit, during their session "An Overview and Update of the EU AI Factories Initiative" incl. HIGHER introduction. #OCPSummit25
📽️Find out how to watch the presentation at https://t.co/U9LZsqxQcA
🚗 NEXT WEEK at #RISCVSummit North America: Winning the Future of RISC-V Automotive MCU Through Ecosystem Collaboration and Open Standards
For Infineon Technologies — one of the world’s largest automotive semiconductor suppliers — the future of automotive is based on RISC-V. By moving their future MCU lineup to the RISC-V ISA, they’re unlocking flexibility for traditional and AI-driven workloads alike, while leveraging the power of a thriving global ecosystem.
Join Infineon alongside VECTOR North America, Green Hills Software, Lauterbach GmbH, and Synopsys Inc. as they explore how collaboration, open standards, and co-development are driving the next era of automotive innovation.
Register today > https://t.co/iQrjfEfiXb
🤔Is this the most complex processor ever conceived in Europe? Learn how SiPearl’s Rhea1 Tape-Out Advances European Sovereignty and Supports HIGHER Project Goals in this post: https://t.co/8r5qi09qGR
👋First up in our "Meet the Consortium" series is our coordinating partner @ICS_FORTH. Learn about one of Europe's leading research centres and their various roles in the HIGHER project here:
🔗 https://t.co/TfOO5uoFTk
@hipeac Info #75 is out now! Features 2 RISER articles. Using Multi-devices with OpenMP, by Xavier Teruel and Roger Ferrer (@BSC_CNS), & The Role of SiPearl CPUs in the ARM Ecosystem and RISER Project, by Roberto Mostallino (SiPearl).
https://t.co/tQHWzw0aPy
Join us for the @OpenComputePrj EMEA Community Monthly Call, w/ presentations from Manolis Marazakis (@ICS_FORTH) and Karl Rabe (Co-Lead OCP MDC Group) & founder of Wooden Data Center.
🗓️Online: 16:00-17:00, Tue, 10 Jun.
More info: https://t.co/z3lLIIZUSO