New Publication in Nature Communications
I’m excited to share our recent article:
“Probabilistic Greedy Algorithm Solver Using Magnetic Tunneling Junctions for the Traveling Salesman Problem”
🔗 https://t.co/KwZbfsRZoJ
Demonstration of high-reconfigurability and low-power strong physical unclonable function empowered by FeFET cycle-to-cycle variation and charge-domain computing
https://t.co/coyxjPmDix @NatureComms@Selinitter
Yin et al. report a #ferroelectric field effect transistor based compute-in-memory annealer for solving larger-scale combinatorial optimization problems through algorithm-hardware co-design with a #FeFET#chip.
Now out👉 @NatureComms https://t.co/jEQNyOTMuK
In a new study, we demonstrate ferroelectric field effect transistor (FeFET) based compute-in-memory (CiM) macro for optimization problems with high energy efficiency and scalability. @NatureComms@Selinitter https://t.co/uZdEGLiDjz
@DennisGMeier @NTNUnorway @NtnuNano @NTNUNaturalSci Very nice visualization, the general concept reminds me of some earlier work we did on lithium niobate domain walls with PEEM for domain wall reconstruction, maybe worth to check: https://t.co/mPAmxkt3XS
Our research on IMC using FeFET published in Nature Communications - "First Demonstration of In-Memory Computing Crossbar using Multi-level Cell FeFET".
https://t.co/CyX4ZjopP6
Die starke Mikroelektronikforschung in Sachsen ist mit ein wesentlicher Grund für die Ansiedlung so vieler Chipfabriken im Freistaat, meint Wissenschaftsminister Gemkow:
https://t.co/DgqBuKu6l5
@SMWK_SN @FraunhoferENAS @FraunhoferIPMS@NaMLab_gGmbH @HZDR_Dresden @silicon
Further evidence for ferroelastic switching in ferroelectric HfO2 layers, which might be the root-cause for their promoted wake-up effect. @FraunhoferIPMS@GFfab1@tudresden_de https://t.co/iVOEft50rG
In this paper we extend our 1F-1T concept to multi-level cell operation, demonstrating the compute efficiency increases by it @FraunhoferIPMS, strong collaboration with @iitmadras@GFfab1@NYCU_official https://t.co/FOu46q5Q5I
In our new article in ACM Transactions on Design Automation of Electronic Systems we demonstrate a novel architecture called ProtFe for Secure Power Side-Channel Protection for FeFET Memories @TsinghuaEE@_RITEngineering@PennStateEECS@FraunhoferIPMS https://t.co/pSGDxQKdul
In this new preprint we demonstrate how it would be possible to use multi-level cell operation in FeFET for compute-in-memory operation to strongly improve compute efficiency by a ramp technique @FraunhoferIPMS@bosch@TU_Muenchen https://t.co/8whhJfmMRA