We are happy to announce the first commercial #RISCV#vector processor IP #NX27V is upgraded to support the latest @RISCV Vector (RVV) extension spec. Find out more: https://t.co/KfajfEdvK9
Pleased to extend the collaboration with @ImperasSoftware to Andes Custom Extension and Imperas’ fast simulators! SoC designers can easily and efficiently define new instructions on Andes #RISCV processor cores to speed up target applications. https://t.co/jNqlq3KaPe @risc_v
Telink Semiconductor has introduced the TLSR9 series, a new connectivity system on chip (SoC) for hearables, wearables and high-performance internet of things (IoT). https://t.co/0jxYvZNHeD The SoC is based on a 32-bit AndesCore D25F with P-extension from Andes Technology.
📣 Upcoming #RISCVCON#webinar next Thursday on Mar 26! Topic: Andes Software Solutions for RISC-V
✍Register now:
4 PM (GMT+9) https://t.co/b2lKhOo5Ya
9 AM (PDT) https://t.co/HttUzx0gEe
🎦Past recordings and slides are available on Andes website!
🌐 https://t.co/3ZdVqnKpZC
If you missed the first presentation in the Andes RISC-V Con Webinar Series "Introduction to Andes RISC-V CPU cores lineup," by Andes Advanced Engineer Tung Wei, you can view the recording here. https://t.co/qj8KdxHMZ9
Day2 #ew20! Find us at booth 3A/3A-536 and
@FlorianWoh will give a talk at 3:30PM. The talk will also be presented at 12:40PM tomorrow. Don't miss out! #RISCVEW20#RISCV
Visit Andes booth at #EW20 3A/3A-536 to check out the AWS demo based on Corvette-F1 N25 and listen to the talk of @FlorianWoh on ”AI from Edge to Cloud: Leveraging RISC-V with DSP, Vector and Custom Instructions ”at 11:00 AM today. #RISCVEW20#RISCV
Join Andes for its Inaugural #RISCV Toronto #Meetup and Roundtable on February 18 from 5:00 PM to 7:00 PM. It will be held at the Bahen Centre, Room 1220 in the University of Toronto at 40 St. George St., Toronto, ON. @risc_v Register now: https://t.co/EMiUTJajdv