Corellium’s virtualization allows you to debug your hardware IP and your drivers together. Connect your HDL simulator to Corellium ARM virtual machines with AXI 4 or Wishbone bus and speed up your design cycle.
#Tensorflow lite model accelerated on the FPGA using dedicated CNN cores around our #lambdasoc and our #minerva RISC-V CPU. The demo uses our ECPIX5 board. https://t.co/skkUWC3DGA
99€ for a general purpose ECP5-5G (from @latticesemi) board with 8 PMODS, DDR3 RAM, GB Ethernet, microSD UHS-2, HDMI, SATA, USB-C, RGB leds.! Perfect for learning nMigen! (If you find cheaper, just let us know😉) https://t.co/ucGOZnS05e
@ktemkin And if you wanted to do it yourself, would you rather make the lane go through a GTX in loopback mode or sniff passively and bring it to the RX of the GTX?
@gaya_tech No, they will likely send you a rep, and check if they can not offer you something they mass produce.. It’d cost them less than running a whole production.. that’s how it unfortunately works most of the time