Marco Bertuletti

Italian based in Zürich, hardware engineer

[PULP Platform @pulp_platform]

The "Birds of Feather" meeting on open source EDAs took place at #DAC2025 yesterday. Here are the photos and slides from Marco's @MarcoBertuletti talk "Open-Source From Ideas to Silicon: PULP Teaching & Research with Open IPs, EDAs, PDKs" https://t.co/kJNQsrnkNE

[PULP Platform @pulp_platform]

#DAC2025 is underway! You can now find Marco's @MarcoBertuletti poster and slides presenting "Fast End-to-End Simulation and Exploration of Many-RISCV-Core Baseband Transceivers for SDR-Access Networks" on our website: https://t.co/RfEqBAXj7g and https://t.co/WntcREaJSn

[PULP Platform @pulp_platform]

#DAC2025 is about to start and we are ready! Marco @MarcoBertuletti and Luca @lucacolagrande3 made it to from the bottom of the Yosemite Valley to the Clouds Rest (1940m elevation gain). And they promised to wash their PULP T-shirts before the conference😀 .

[PULP Platform @pulp_platform]

Meet us at #DAC2025 for "Fast End-to-End Simulation and Exploration of Many-Core Baseband Transceivers for Software-Defined Radio-Access Networks" presented by Marco @MarcoBertuletti on Monday, June 23 in Room: 3008, Level 3, at 3:30 pm: https://t.co/VvHLJJ9ugE

[PULP Platform @pulp_platform]

Our 64-core RISC-V chip Heartstream just came back from the fab. Thank you @GlobalFoundries UPP for supporting us with this project. Learn more about the chip in our ASIC gallery: https://t.co/VJBS0qTMWj. Time to test🥼🐻!

[PULP Platform @pulp_platform]

Wonderful news from Tangier! Our paper on TeraPool "A 1024 RV-Cores Shared-L1 Cluster with High Bandwidth Memory Link for Low-Latency 6G-SDR" just won the Best PhD forum Award at VLSI-SoC 2024. Below Yichao @yichao_zh with Henk Corporaal 🇳🇱 & Said Hamdioui receiving the award🏆.

[PULP Platform @pulp_platform]

Our Yichao @yichao_zh is currently in Tanger 🇲🇦 attending VLSI-SoC. You can find his poster & paper on TeraPool "1024 RV-Cores Shared-L1 Cluster with High Bandwidth Memory Link for Low-Latency 6G-SDR" here: https://t.co/vP0VjxdV5e https://t.co/N4I4YEu0WD @MarcoBertuletti @saem_r

[PULP Platform @pulp_platform]

Our "TeraPool-SDR: An 1.89TOPS 1024 RV-Cores 4MiB Shared-L1 Cluster for Next-Generation Open-Source Software-Defined Radios" by @yichao_zh landed with @MarcoBertuletti in Tampa FL where it was presented at #GLSVLSI2024. Learn more https://t.co/OAkYQzPzAw & https://t.co/3DQcd0QLsY

[Marco Bertuletti @MarcoBertuletti]

After Maestro and Heartstream, with GF22 “Buckbeak” I celebrate the third successful tape-out project in six months… only in @pulp_platform!

The Spatz cluster I mainly worked on is right below the hippogriff 🐎🦅, and it contains a configurable dual-core vector processor.

[PULP Platform @pulp_platform]

We have just taped out our SoC Buckbeak🐎. Buckbeak in GF22 is designed to provide a compact, efficient & flexible solution for on-demand reconfigurability of a dual-vector core cluster. Check it out: https://t.co/TJYv61ZUF8 @mattia_siniga @MarcoBertuletti @OttG__ @duav_red

[Marco Bertuletti @MarcoBertuletti]

Congrats for the amazing work to @yichao_zh!

[PULP Platform @pulp_platform]

We present the architecture, design & full physical implementation of "TeraPool-SDR: An 1.89TOPS 1024 RV-Cores 4MiB Shared-L1 Cluster for Next-Generation Open-Source Software-Defined Radios". High energy efficiency on all SDR key kernels for 5G RANs. See https://t.co/dHg9VdTROH

[Marco Bertuletti @MarcoBertuletti]

I cannot wait to test this! 🐍

[PULP Platform @pulp_platform]

Just in time for Valentine’s Day, here comes the first PULP chip of the year: Heartstream in GF12. An implementation of our MemPool architecture with 64 RISC-V cores. Supported by @GlobalFoundries UPP https://t.co/VJBS0qTf6L

[PULP Platform @pulp_platform]

We have recently taped out Maestro, a highly specialized SoC fabricated in TSMC65 that offers a compact and efficient solution for the acceleration of radar and ML workloads. Check it out: https://t.co/NBml2TMnYI

[PULP Platform @pulp_platform]

Our paper "Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster" focusing on barrier synchronization for TeraPool is now on arXiv. Check it out: https://t.co/fJeAzY4vkQ @MarcoBertuletti @saem_r @yichao_zh @vanelliale

[Marco Bertuletti @MarcoBertuletti]

Many-Core Clusters are more and more popular for large parallel workloads, but when the core count increases synchronisation becomes a burden. In the study I presented at Samos we addressed the issue…

[PULP Platform @pulp_platform]

The slides from @MarcoBertuletti's talk "Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster" presented at SAMOSXXIII are now online. Take a look: https://t.co/Gi6J247vda

[Marco Bertuletti @MarcoBertuletti]

The birthplace of Pythagoras 📐, Epicurus 🌿, and Aristarchus 🌞, what a wonderful place for a conference... I'm glad of presenting there our work on shared-memory barriers for the massive 1024-cores TeraPool cluster

[PULP Platform @pulp_platform]

Are you attending SAMOS XXIII? On July 5 we will be presenting our work titled "Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster" Looking forward! https://t.co/KpYMWU5sko @MarcoBertuletti @saem_r @yichao_zh @vanelliale

[PULP Platform @pulp_platform]

Upon popular request, we released an early version of our new Network-on-Chip FlooNoC on Github https://t.co/yCLPeFZIW1. Make sure you state your destination clearly, otherwise your packets might end up somewhere else 🔮🧙🍵. @fischetim

[PULP Platform @pulp_platform]

The poster session is under way at #RISCVSummitEurope in Barcelona and here we have @MarcoBertuletti explaining his work on "Parallel Sparse Deep Learning Operators on Lightweight RISC-V Processors" https://t.co/Q1ZcjxRJFr

[Marco Bertuletti @MarcoBertuletti]

On the stage! The @pulp_platform anniversary in Lugano was great. I’m glad I had the opportunity to meet the whole team and present my research with @yichao_zh.

[PULP Platform @pulp_platform]

Here they come, Marco @MarcoBertuletti & Yichao @yichao_zh presenting "TeraPool: Boosting Wireless Communications by Pooling 1000s Cores with PULP". Beware of the PUSCH 🤣. https://t.co/rfcwvyol8Y

[Marco Bertuletti @MarcoBertuletti]

I will join, of course! @yichao_zh and me will present on the TeraPool project: 1000s cores for B5G and 6G processing!

[PULP Platform @pulp_platform]

It's ten years of PULP and next week we are meeting for a get-together at USI Lugano to take a look at what we accomplished and where we would like to be in ten year's time😇. We will be sharing photos and talks from the event. Here is the schedule: https://t.co/kl5kqyRrp5

[PULP Platform @pulp_platform]

Our @GiannaPaulin is presenting Occamy at #DATE2023 and Bianca The Bear is paying attention. Occamy is our super ambitious project. The compute die contains 216 RISC-V cores and includes an HBM controller. https://t.co/mdsCEhAD8y